Datasheet LTC2440 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 24-Bit High Speed Differential ∆∑ ADC with Selectable Speed/Resolution |
| Pages / Page | 30 / 4 — POWER REQUIREMENTS. The. denotes the specifications which apply over the … |
| File Format / Size | PDF / 436 Kb |
| Document Language | English |
POWER REQUIREMENTS. The. denotes the specifications which apply over the full operating temperature
Model Line for this Datasheet
Text Version of Document
LTC2440
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 4.5 5.5 V ICC Supply Current Conversion Mode CS = 0V (Note 7) l 8 11 mA Sleep Mode CS = VCC (Note 7) l 8 30 µA
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range l 0.1 12 MHz tHEO External Oscillator High Period l 25 10000 ns tLEO External Oscillator Low Period l 25 10000 ns tCONV Conversion Time OSR = 256 (SDI = 0) l 0.99 1.13 1.33 ms OSR = 32768 (SDI = 1) l 126 145 170 ms l External Oscillator (Note 10, 13) 40 • OSR + 178 ms fEOSC(kHz) fISCK Internal SCK Frequency Internal Oscillator (Note 9) l 0.8 0.9 1 MHz External Oscillator (Notes 9, 10) fEOSC/10 Hz DISCK Internal SCK Duty Cycle (Note 9) l 45 55 % fESCK External SCK Frequency Range (Note 8) l 20 MHz tLESCK External SCK Low Period (Note 8) l 25 ns tHESCK External SCK High Period (Note 8) l 25 ns tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 9, 11) l 30.9 35.3 41.6 µs External Oscillator (Notes 9, 10) 320/fEOSC s tDOUT_ESCK External SCK 32-Bit Data Output Time (Note 8) l 32/f ↑ ESCK s t1 CS to SDO Low Z (Note 12) l 0 25 ns t2 CS ↑ to SDO High Z (Note 12) l 0 25 ns ↑ ↑ t3 CS to SCK (Note 9) l 5 µs ↑ t4 CS to SCK ↑ (Notes 8, 12) l 25 ns ↑ tKQMAX SCK to SDO Valid l 25 ns ↑ tKQMIN SDO Hold After SCK (Note 5) l 15 ns ↑ t5 SCK Set-Up Before CS l 50 ns t7 SDI Setup Before SCK ↑ (Note 5) l 10 ns t8 SDI Hold After SCK ↑ (Note 5) l 10 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
Note 7:
The converter uses the internal oscillator. cause permanent damage to the device. Exposure to any Absolute Maximum
Note 8:
The converter is in external SCK mode of operation such that the Rating condition for extended periods may affect device reliability and lifetime. SCK pin is used as a digital input. The frequency of the clock signal driving
Note 2:
All voltage values are with respect to GND. SCK during the data output is fESCK and is expressed in Hz.
Note 3:
VCC = 4.5 to 5.5V unless otherwise specified.
Note 9:
The converter is in internal SCK mode of operation such that the VREF = REF+ – REF–, VREFCM = (REF+ + REF–)/2; SCK pin is used as a digital output. In this mode of operation, the SCK pin V has a total equivalent load capacitance of C IN = IN+ – IN–, VINCM = (IN+ + IN–)/2. LOAD = 20pF.
Note 4:
f
Note 10:
The external oscillator is connected to the f O pin tied to GND or to external conversion clock source with O pin. The external f oscillator frequency, f EOSC = 10MHz unless otherwise specified. EOSC, is expressed in kHz.
Note 5:
Guaranteed by design, not subject to test.
Note 11:
The converter uses the internal oscillator. fO = 0V.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
Note 12:
Guaranteed by design and test correlation. straight line passing through the actual endpoints of the transfer curve.
Note 13:
There is an internal reset that adds an additional 5 to 15 fO cycles The deviation is measured from the center of the quantization band. to the conversion time. 2440fe 4 For more information www.linear.com/LTC2440 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Pin Functions Typical Application Related Parts
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 4.5 5.5 V ICC Supply Current Conversion Mode CS = 0V (Note 7) l 8 11 mA Sleep Mode CS = VCC (Note 7) l 8 30 µA
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range l 0.1 12 MHz tHEO External Oscillator High Period l 25 10000 ns tLEO External Oscillator Low Period l 25 10000 ns tCONV Conversion Time OSR = 256 (SDI = 0) l 0.99 1.13 1.33 ms OSR = 32768 (SDI = 1) l 126 145 170 ms l External Oscillator (Note 10, 13) 40 • OSR + 178 ms fEOSC(kHz) fISCK Internal SCK Frequency Internal Oscillator (Note 9) l 0.8 0.9 1 MHz External Oscillator (Notes 9, 10) fEOSC/10 Hz DISCK Internal SCK Duty Cycle (Note 9) l 45 55 % fESCK External SCK Frequency Range (Note 8) l 20 MHz tLESCK External SCK Low Period (Note 8) l 25 ns tHESCK External SCK High Period (Note 8) l 25 ns tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 9, 11) l 30.9 35.3 41.6 µs External Oscillator (Notes 9, 10) 320/fEOSC s tDOUT_ESCK External SCK 32-Bit Data Output Time (Note 8) l 32/f ↑ ESCK s t1 CS to SDO Low Z (Note 12) l 0 25 ns t2 CS ↑ to SDO High Z (Note 12) l 0 25 ns ↑ ↑ t3 CS to SCK (Note 9) l 5 µs ↑ t4 CS to SCK ↑ (Notes 8, 12) l 25 ns ↑ tKQMAX SCK to SDO Valid l 25 ns ↑ tKQMIN SDO Hold After SCK (Note 5) l 15 ns ↑ t5 SCK Set-Up Before CS l 50 ns t7 SDI Setup Before SCK ↑ (Note 5) l 10 ns t8 SDI Hold After SCK ↑ (Note 5) l 10 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
Note 7:
The converter uses the internal oscillator. cause permanent damage to the device. Exposure to any Absolute Maximum
Note 8:
The converter is in external SCK mode of operation such that the Rating condition for extended periods may affect device reliability and lifetime. SCK pin is used as a digital input. The frequency of the clock signal driving
Note 2:
All voltage values are with respect to GND. SCK during the data output is fESCK and is expressed in Hz.
Note 3:
VCC = 4.5 to 5.5V unless otherwise specified.
Note 9:
The converter is in internal SCK mode of operation such that the VREF = REF+ – REF–, VREFCM = (REF+ + REF–)/2; SCK pin is used as a digital output. In this mode of operation, the SCK pin V has a total equivalent load capacitance of C IN = IN+ – IN–, VINCM = (IN+ + IN–)/2. LOAD = 20pF.
Note 4:
f
Note 10:
The external oscillator is connected to the f O pin tied to GND or to external conversion clock source with O pin. The external f oscillator frequency, f EOSC = 10MHz unless otherwise specified. EOSC, is expressed in kHz.
Note 5:
Guaranteed by design, not subject to test.
Note 11:
The converter uses the internal oscillator. fO = 0V.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
Note 12:
Guaranteed by design and test correlation. straight line passing through the actual endpoints of the transfer curve.
Note 13:
There is an internal reset that adds an additional 5 to 15 fO cycles The deviation is measured from the center of the quantization band. to the conversion time. 2440fe 4 For more information www.linear.com/LTC2440 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Pin Functions Typical Application Related Parts
