Datasheet LTC2440 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 24-Bit High Speed Differential ∆∑ ADC with Selectable Speed/Resolution |
| Pages / Page | 30 / 9 — FUNCTIONAL BLOCK DIAGRAM. Figure 1. Functional Block Diagram. TEST … |
| File Format / Size | PDF / 436 Kb |
| Document Language | English |
FUNCTIONAL BLOCK DIAGRAM. Figure 1. Functional Block Diagram. TEST CIRCUITS. APPLICATIONS INFORMATION CONVERTER OPERATION
Model Line for this Datasheet
Text Version of Document
LTC2440
FUNCTIONAL BLOCK DIAGRAM
INTERNAL VCC OSCILLATOR GND AUTOCALIBRATION AND CONTROL fO (INT/EXT) IN+ + IN– – SDO ADC SCK SERIAL CS DECIMATING FIR INTERFACE SDI BUSY DAC 2440 F01 EXT + – REF+ REF–
Figure 1. Functional Block Diagram TEST CIRCUITS
VCC 1.69k SDO SDO 1.69k CLOAD = 20pF CLOAD = 20pF Hi-Z TO VOH VOL TO VOH V Hi-Z TO VOL 2440 TA03 OH TO Hi-Z VOH TO VOL V 2440 TA04 OL TO Hi-Z
APPLICATIONS INFORMATION CONVERTER OPERATION
CONVERT
Converter Operation Cycle
The LTC2440 is a high speed, delta-sigma analog-to-digital SLEEP converter with an easy to use 4-wire serial interface (see Figure 1). Its operation is made up of three states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with the FALSE CS = LOW AND data output (see Figure 2). The 4-wire interface consists SCK of serial data input (SDI), serial data output (SDO), serial TRUE clock (SCK) and chip select (CS). The interface, timing, DATA OUTPUT operation cycle and data out format is compatible with 2440 F02 the LTC2410.
Figure 2. LTC2440 State Transition Diagram
2440fe For more information www.linear.com/LTC2440 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Pin Functions Typical Application Related Parts
FUNCTIONAL BLOCK DIAGRAM
INTERNAL VCC OSCILLATOR GND AUTOCALIBRATION AND CONTROL fO (INT/EXT) IN+ + IN– – SDO ADC SCK SERIAL CS DECIMATING FIR INTERFACE SDI BUSY DAC 2440 F01 EXT + – REF+ REF–
Figure 1. Functional Block Diagram TEST CIRCUITS
VCC 1.69k SDO SDO 1.69k CLOAD = 20pF CLOAD = 20pF Hi-Z TO VOH VOL TO VOH V Hi-Z TO VOL 2440 TA03 OH TO Hi-Z VOH TO VOL V 2440 TA04 OL TO Hi-Z
APPLICATIONS INFORMATION CONVERTER OPERATION
CONVERT
Converter Operation Cycle
The LTC2440 is a high speed, delta-sigma analog-to-digital SLEEP converter with an easy to use 4-wire serial interface (see Figure 1). Its operation is made up of three states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with the FALSE CS = LOW AND data output (see Figure 2). The 4-wire interface consists SCK of serial data input (SDI), serial data output (SDO), serial TRUE clock (SCK) and chip select (CS). The interface, timing, DATA OUTPUT operation cycle and data out format is compatible with 2440 F02 the LTC2410.
Figure 2. LTC2440 State Transition Diagram
2440fe For more information www.linear.com/LTC2440 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Pin Functions Typical Application Related Parts
