Datasheet LTC2450 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Easy-to-Use, Ultra-Tiny 16-Bit ΔΣ ADC |
| Pages / Page | 20 / 3 — POWER REQUIREMENTS. The. denotes the specifi cations which apply over the … |
| File Format / Size | PDF / 207 Kb |
| Document Language | English |
POWER REQUIREMENTS. The. denotes the specifi cations which apply over the full operating temperature
Model Line for this Datasheet
Text Version of Document
LTC2450
POWER REQUIREMENTS The
l
denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion CS = GND (Note 6) l 350 600 μA Sleep CS = VCC (Note 6) l 0.05 0.5 μA
The DIGITAL INPUTS AND DIGITAL OUTPUTS
l
denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at TA = 25°C. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l VCC – 0.3 V VIL Low Level Input Voltage l 0.3 V IIN Digital Input Current l –10 10 μA CIN Digital Input Capacitance 10 pF VOH High Level Output Voltage IO = –800μA l VCC – 0.5 V VOL Low Level Output Voltage IO = –1.6mA l 0.4 V IOZ Hi-Z Output Leakage Current l –10 10 μA
The TIMING CHARACTERISTICS
l
denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time l 29 33.3 42 ms fSCK SCK Frequency Range l 2 MHz tlSCK SCK Low Period l 250 ns thSCK SCK High Period l 250 ns t1 CS Falling Edge to SDO Low Z (Notes 7, 8) l 0 100 ns t2 CS Rising Edge to SDO High Z (Notes 7, 8) l 0 100 ns t3 CS Falling Edge to SCK Falling Edge l 100 ns tKQ SCK Falling Edge to SDO Valid (Note 7) l 0 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
CS = VCC. A positive current is fl owing into the DUT pin. may cause permanent damage to the device. Exposure to any Absolute
Note 6:
SCK = VCC or GND. SDO is high impedance. Maximum Rating condition for extended periods may affect device
Note 7:
See Figure 3. reliability and lifetime.
Note 8:
See Figure 4.
Note 2:
All voltage values are with respect to GND. VCC = 2.7V to 5.5V
Note 9:
Input sampling current is the average input current drawn from the unless otherwise specifi ed. input sampling network while the LTC2450 is actively sampling the input.
Note 3:
Guaranteed by design, not subject to test.
Note 4:
Integral nonlinearity is defi ned as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Guaranteed by design, test correlation and 3 point transfer curve measurement. 2450fb 3
POWER REQUIREMENTS The
l
denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion CS = GND (Note 6) l 350 600 μA Sleep CS = VCC (Note 6) l 0.05 0.5 μA
The DIGITAL INPUTS AND DIGITAL OUTPUTS
l
denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at TA = 25°C. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l VCC – 0.3 V VIL Low Level Input Voltage l 0.3 V IIN Digital Input Current l –10 10 μA CIN Digital Input Capacitance 10 pF VOH High Level Output Voltage IO = –800μA l VCC – 0.5 V VOL Low Level Output Voltage IO = –1.6mA l 0.4 V IOZ Hi-Z Output Leakage Current l –10 10 μA
The TIMING CHARACTERISTICS
l
denotes the specifi cations which apply over the full operating temperature range,otherwise specifi cations are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time l 29 33.3 42 ms fSCK SCK Frequency Range l 2 MHz tlSCK SCK Low Period l 250 ns thSCK SCK High Period l 250 ns t1 CS Falling Edge to SDO Low Z (Notes 7, 8) l 0 100 ns t2 CS Rising Edge to SDO High Z (Notes 7, 8) l 0 100 ns t3 CS Falling Edge to SCK Falling Edge l 100 ns tKQ SCK Falling Edge to SDO Valid (Note 7) l 0 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
CS = VCC. A positive current is fl owing into the DUT pin. may cause permanent damage to the device. Exposure to any Absolute
Note 6:
SCK = VCC or GND. SDO is high impedance. Maximum Rating condition for extended periods may affect device
Note 7:
See Figure 3. reliability and lifetime.
Note 8:
See Figure 4.
Note 2:
All voltage values are with respect to GND. VCC = 2.7V to 5.5V
Note 9:
Input sampling current is the average input current drawn from the unless otherwise specifi ed. input sampling network while the LTC2450 is actively sampling the input.
Note 3:
Guaranteed by design, not subject to test.
Note 4:
Integral nonlinearity is defi ned as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Guaranteed by design, test correlation and 3 point transfer curve measurement. 2450fb 3
