Datasheet LTC3700 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Constant Frequency Step-Down DC/DC Controller with LDO Regulator |
| Pages / Page | 16 / 9 — OPERATIO. (Refer to Functional Diagram). Soft-Start. LDO Regulator. … |
| File Format / Size | PDF / 221 Kb |
| Document Language | English |
OPERATIO. (Refer to Functional Diagram). Soft-Start. LDO Regulator. Figure 2. Maximum Output Current vs Duty Cycle
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LTC3700
U OPERATIO (Refer to Functional Diagram)
when the buck is operating below 40% duty cycle. How- The LDO is protected by both current limit and thermal ever, once the duty cycle exceeds 40%, slope com- shutdown circuits. Current limit is set such that the output pensation begins and effectively reduces the peak induc- voltage will start dropping out when the load current reaches tor current. The amount of reduction is given by the curves approximately 200mA. With a short-circuited LDO output, in Figure 2. the device will limit the sourced current to approximately 225mA. The thermal shutdown circuit has a typical trip
Soft-Start
point of 150°C with a typical hysteresis of 5°C. In thermal shutdown, the LDO pass device is turned off. An internal default soft-start circuit is employed at power up and/or when coming out of shutdown. The soft-start Frequency compensation of the LDO is accomplished by circuit works by internally clamping the voltage at the ITH/ forcing the dominant pole at the output. For stability, a low RUN pin to the corresponding zero-current level and ESR ceramic capacitor ≥ 2.2µF is required from LDO to gradually raising the clamp voltage such that the minimum GND. For improved transient response, particularly at time required for the programmed switch current to reach heavy loads, it is recommended to use the largest value of its maximum is approximately 0.5msec. After the soft- capacitor available in the same size considered. start circuit has timed out, it is disabled until the part is put Both the buck and the LDO share the same internally in shutdown again or the input supply is cycled. generated bandgap reference voltage for their feedback reference. When both input supplies are present, the
LDO Regulator
internal reference is powered by the buck input supply The 150mA low dropout (LDO) regulator on the LTC3700 (VIN). For this reason, line regulation for the LDO output is employs an internal P-channel MOSFET pass device be- specified both with respect to VIN and VIN2 if the buck is tween its input supply (VIN2) and the LDO output pin. The present and with respect only to VIN2 if the buck is pass FET has an on-resistance of approximately 1.5Ω disabled. The same is true for VIN2 supply current, which (with VIN2 = 4.2V) with a strong dependence on input will be higher when the buck is disabled by the current supply voltage. The dropout voltage is simply the FET on- draw of the internal reference. resistance multiplied by the load current when in dropout. 110 100 90 (%) 80 70 OUT(MAX) 60 /I 50 OUT IRIPPLE = 0.4IPK 40 AT 5% DUTY CYCLE SF = I I 30 RIPPLE = 0.2IPK AT 5% DUTY CYCLE 20 VIN = 4.2V 10 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 3700 F02
Figure 2. Maximum Output Current vs Duty Cycle
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U OPERATIO (Refer to Functional Diagram)
when the buck is operating below 40% duty cycle. How- The LDO is protected by both current limit and thermal ever, once the duty cycle exceeds 40%, slope com- shutdown circuits. Current limit is set such that the output pensation begins and effectively reduces the peak induc- voltage will start dropping out when the load current reaches tor current. The amount of reduction is given by the curves approximately 200mA. With a short-circuited LDO output, in Figure 2. the device will limit the sourced current to approximately 225mA. The thermal shutdown circuit has a typical trip
Soft-Start
point of 150°C with a typical hysteresis of 5°C. In thermal shutdown, the LDO pass device is turned off. An internal default soft-start circuit is employed at power up and/or when coming out of shutdown. The soft-start Frequency compensation of the LDO is accomplished by circuit works by internally clamping the voltage at the ITH/ forcing the dominant pole at the output. For stability, a low RUN pin to the corresponding zero-current level and ESR ceramic capacitor ≥ 2.2µF is required from LDO to gradually raising the clamp voltage such that the minimum GND. For improved transient response, particularly at time required for the programmed switch current to reach heavy loads, it is recommended to use the largest value of its maximum is approximately 0.5msec. After the soft- capacitor available in the same size considered. start circuit has timed out, it is disabled until the part is put Both the buck and the LDO share the same internally in shutdown again or the input supply is cycled. generated bandgap reference voltage for their feedback reference. When both input supplies are present, the
LDO Regulator
internal reference is powered by the buck input supply The 150mA low dropout (LDO) regulator on the LTC3700 (VIN). For this reason, line regulation for the LDO output is employs an internal P-channel MOSFET pass device be- specified both with respect to VIN and VIN2 if the buck is tween its input supply (VIN2) and the LDO output pin. The present and with respect only to VIN2 if the buck is pass FET has an on-resistance of approximately 1.5Ω disabled. The same is true for VIN2 supply current, which (with VIN2 = 4.2V) with a strong dependence on input will be higher when the buck is disabled by the current supply voltage. The dropout voltage is simply the FET on- draw of the internal reference. resistance multiplied by the load current when in dropout. 110 100 90 (%) 80 70 OUT(MAX) 60 /I 50 OUT IRIPPLE = 0.4IPK 40 AT 5% DUTY CYCLE SF = I I 30 RIPPLE = 0.2IPK AT 5% DUTY CYCLE 20 VIN = 4.2V 10 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 3700 F02
Figure 2. Maximum Output Current vs Duty Cycle
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