Datasheet LTC3830, LTC3830-1 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | High Power Step-Down Synchronous DC/DC Controllers for Low Voltage Operation |
| Pages / Page | 24 / 7 — PI FU CTIO S. FREQSET (Pin 11/NA/NA):. VCC (Pin 14/Pin 7/Pin 7):. MAX … |
| File Format / Size | PDF / 277 Kb |
| Document Language | English |
PI FU CTIO S. FREQSET (Pin 11/NA/NA):. VCC (Pin 14/Pin 7/Pin 7):. MAX (Pin 12/NA/NA):. PVCC2 (Pin 15/Pin 7/Pin 7):
Model Line for this Datasheet
Text Version of Document
LTC3830/LTC3830-1
U U U PI FU CTIO S FREQSET (Pin 11/NA/NA):
Frequency Set. Use this pin to
VCC (Pin 14/Pin 7/Pin 7):
Power Supply Input. All low adjust the free-running frequency of the internal oscillator. power internal circuits draw their supply from this pin. With the pin floating, the oscillator runs at about 200kHz. Connect this pin to a clean power supply, separate from A resistor from FREQSET to ground speeds up the oscil- the main VIN supply at the drain of Q1. This pin requires a lator; a resistor to VCC slows it down. 4.7µF bypass capacitor. The LTC3830-1 and the 8-lead LTC3830 have V
I
CC and PVCC2 tied together at Pin 7 and
MAX (Pin 12/NA/NA):
Current Limit Threshold Set. IMAX require a 10 sets the threshold for the internal current limit compara- µF bypass capacitor to GND. tor. If IFB drops below IMAX with G1 on, the LTC3830 goes
PVCC2 (Pin 15/Pin 7/Pin 7):
Power Supply Input for G2. into current limit. IMAX has an internal 12µA pull-down to Connect this pin to the main high power supply. GND. Connect this pin to the main VIN supply at the drain
G2 (Pin 16/Pin 8/Pin 8):
Bottom Gate Driver Output. of Q1, through an external resistor to set the current limit Connect this pin to the gate of the lower N-channel threshold. Connect a 0.1µF decoupling capacitor across MOSFET, Q2. This output swings from PGND to PV this resistor to filter switching noise. CC2. It remains low when G1 is high or during shutdown mode.
IFB (Pin 13/NA/NA):
Current Limit Sense. Connect this pin To prevent output undershoot during a soft-start cycle, G2 to the switching node at the source of Q1 and the drain of is held low until G1 first goes high. (FFBG in Block Q2 through a 1k resistor. The 1k resistor is required to Diagram.) prevent voltage transients from damaging IFB.This pin is used for sensing the voltage drop across the upper N-channel MOSFET, Q1.
W BLOCK DIAGRA
DISDR LOGIC AND SHDN 100ms DELAY THERMAL SHUTDOWN INTERNAL POWER DOWN OSCILLATOR PVCC1 – FREQSET S Q G1 PWM + R Q PV COMP CC2 12µA FFBG QSS G2 SS S Q ENABLE G2 PGND POR R ERR MIN MAX + – – + – + FB V 18k REF VREF – 3% VREF + 3% SENSE+ CC – IFB 11.2k SENSE– + IMAX VREF 12 V µA REF – 3% BG VREF + 3% 3830 BD 2.2V QC DISABLE 1.2V + ILIM PVCC1 V – VCC1 + 2.5V 3830fa 7
U U U PI FU CTIO S FREQSET (Pin 11/NA/NA):
Frequency Set. Use this pin to
VCC (Pin 14/Pin 7/Pin 7):
Power Supply Input. All low adjust the free-running frequency of the internal oscillator. power internal circuits draw their supply from this pin. With the pin floating, the oscillator runs at about 200kHz. Connect this pin to a clean power supply, separate from A resistor from FREQSET to ground speeds up the oscil- the main VIN supply at the drain of Q1. This pin requires a lator; a resistor to VCC slows it down. 4.7µF bypass capacitor. The LTC3830-1 and the 8-lead LTC3830 have V
I
CC and PVCC2 tied together at Pin 7 and
MAX (Pin 12/NA/NA):
Current Limit Threshold Set. IMAX require a 10 sets the threshold for the internal current limit compara- µF bypass capacitor to GND. tor. If IFB drops below IMAX with G1 on, the LTC3830 goes
PVCC2 (Pin 15/Pin 7/Pin 7):
Power Supply Input for G2. into current limit. IMAX has an internal 12µA pull-down to Connect this pin to the main high power supply. GND. Connect this pin to the main VIN supply at the drain
G2 (Pin 16/Pin 8/Pin 8):
Bottom Gate Driver Output. of Q1, through an external resistor to set the current limit Connect this pin to the gate of the lower N-channel threshold. Connect a 0.1µF decoupling capacitor across MOSFET, Q2. This output swings from PGND to PV this resistor to filter switching noise. CC2. It remains low when G1 is high or during shutdown mode.
IFB (Pin 13/NA/NA):
Current Limit Sense. Connect this pin To prevent output undershoot during a soft-start cycle, G2 to the switching node at the source of Q1 and the drain of is held low until G1 first goes high. (FFBG in Block Q2 through a 1k resistor. The 1k resistor is required to Diagram.) prevent voltage transients from damaging IFB.This pin is used for sensing the voltage drop across the upper N-channel MOSFET, Q1.
W BLOCK DIAGRA
DISDR LOGIC AND SHDN 100ms DELAY THERMAL SHUTDOWN INTERNAL POWER DOWN OSCILLATOR PVCC1 – FREQSET S Q G1 PWM + R Q PV COMP CC2 12µA FFBG QSS G2 SS S Q ENABLE G2 PGND POR R ERR MIN MAX + – – + – + FB V 18k REF VREF – 3% VREF + 3% SENSE+ CC – IFB 11.2k SENSE– + IMAX VREF 12 V µA REF – 3% BG VREF + 3% 3830 BD 2.2V QC DISABLE 1.2V + ILIM PVCC1 V – VCC1 + 2.5V 3830fa 7
