Datasheet LT3743 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | High Current Synchronous Step-Down LED Driver with Three-State Control |
| Pages / Page | 28 / 9 — PIN FUNCTIONS (QFN/TSSOP). GND (Pins 1, 5, 9, 20, 21, Exposed Pad Pin … |
| File Format / Size | PDF / 535 Kb |
| Document Language | English |
PIN FUNCTIONS (QFN/TSSOP). GND (Pins 1, 5, 9, 20, 21, Exposed Pad Pin 29/Pins 2, 7,. SENSE– (Pin 12/Pin 14):
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Text Version of Document
LT3743
PIN FUNCTIONS (QFN/TSSOP) GND (Pins 1, 5, 9, 20, 21, Exposed Pad Pin 29/Pins 2, 7, SENSE– (Pin 12/Pin 14):
SENSE– is the noninverting input
11, 22, 27, Exposed Pad Pin 29):
Ground. The exposed of the average current mode loop error amplifier. The refer- pad must be soldered to the PCB. ence current, based on CTRL_L or CTRL_H flows out of
EN/UVLO (Pin 2/Pin 4):
Enable Pin. The EN/UVLO pin the pin to the output (LED) side of the sense resistor, RS. acts as an enable pin and turns on the internal current
VCL (Pin 13/Pin 15):
VCL provides the necessary compensa- bias core and subregulators at 1.55V. The pin does tion for the average current loop stability during low level not have any pull-up or pull-down, requiring a voltage current regulation. Typical compensation values are 15k bias for normal part operation. Full shutdown occurs at to 80k for the resistor and 2nF to 10nF for the capacitor. approximately 0.5V.
VCH (Pin 14/Pin 16):
VCH provides the necessary compen-
VREF (Pin 3/Pin 5):
Buffered 2V Reference Capable of sation for the average current loop stability during high level 0.5mA Drive. current regulation. Typical compensation values are 15k
CTRL_T (Pin 4/Pin 6):
The thermal control input to reduce to 80k for the resistor and 2nF to 10nF for the capacitor. the regulated current level for both current levels (CTRL_L
RT (Pin 15/Pin 17):
A resistor to ground sets the switching and CTRL_H). frequency between 200kHz and 1MHz. When using the
CTRL_H (Pin 6/Pin 8):
The CTRL_H pin sets the high level SYNC function, set the frequency to be 20% lower than regulated output current and overcurrent. The maximum the SYNC pulse frequency. This pin is current limited to input voltage is internally clamped to 1.5V. The overcur- 60µA. Do not leave this pin open. rent set point is equal to the high level regulated current
SYNC (Pin 16/Pin 18):
Frequency Synchronization Pin. level set by the CTRL_H pin with an additional 23mV offset This pin allows the switching frequency to be synchronized between the SENSE+ and SENSE– pins. to an external clock. The RT resistor should be chosen to
CTRL_L (Pin 7/Pin 9):
The CTRL_L pin sets the low level operate the internal clock at 20% slower than the SYNC regulated output current. It is not recommended that the pulse frequency. The synchronization range is 240kHz to CTRL_L voltage be higher than the CTRL_H voltage. 1.2MHz. This pin should be grounded when not in use.
SS (Pin 8/Pin 10):
Soft-Start Pin. Place an external capaci-
CTRL_SEL (Pin 17/Pin 19):
The CTRL_SEL pin selects tor to ground to limit the regulated current during start-up between the high current control, CTRL_H and the low conditions. The SS pin has a 5.5µA charging current. This current control, CTRL_L. When high, the VCH pin is con- pin controls both of the regulated inputs determined by nected to the error amp output and the PWMGH gate CTRL_L and CTRL_H. signal is high. When low, the VCL pin is connected to the error amp output and the PWMGL gate signal is high. This
FB (Pin 10/Pin 12):
Feedback Pin for Overvoltage Protec- pin is used for current level dimming of the LED. This pin tion. The feedback voltage is 1V. Overvoltage/Open LED should be grounded when not in use. is sensed through the FB pin. When the feedback voltage exceeds 1.3V, the overvoltage lockout prevents switch-
PWM (Pin 18/Pin 20):
The input pin for PWM dimming ing and connects both output capacitors to discharge the of the LED. When low, all switching is terminated and the inductor current. output caps are disconnected. This pin should be pulled to VCC_INT when not in use.
SENSE+ (Pin 11/Pin 13):
SENSE+ is the inverting input of the average current mode loop error amplifier. This pin is
PWMGH (Pin 19/Pin 21):
The PWMGH output pin drives connected to the external current sense resistor, R the gate of an external FET to connect one of the switching S. The voltage drop between SENSE+ and SENSE– referenced to regulator output capacitors to the load. The driver pull-up the voltage drop across an internal resistor produces the impedance is 3.2Ω and pull-down impedance is 1.75Ω. input voltages to the current regulation loop. 3743fe For more information www.linear.com/LT3743 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS (QFN/TSSOP) GND (Pins 1, 5, 9, 20, 21, Exposed Pad Pin 29/Pins 2, 7, SENSE– (Pin 12/Pin 14):
SENSE– is the noninverting input
11, 22, 27, Exposed Pad Pin 29):
Ground. The exposed of the average current mode loop error amplifier. The refer- pad must be soldered to the PCB. ence current, based on CTRL_L or CTRL_H flows out of
EN/UVLO (Pin 2/Pin 4):
Enable Pin. The EN/UVLO pin the pin to the output (LED) side of the sense resistor, RS. acts as an enable pin and turns on the internal current
VCL (Pin 13/Pin 15):
VCL provides the necessary compensa- bias core and subregulators at 1.55V. The pin does tion for the average current loop stability during low level not have any pull-up or pull-down, requiring a voltage current regulation. Typical compensation values are 15k bias for normal part operation. Full shutdown occurs at to 80k for the resistor and 2nF to 10nF for the capacitor. approximately 0.5V.
VCH (Pin 14/Pin 16):
VCH provides the necessary compen-
VREF (Pin 3/Pin 5):
Buffered 2V Reference Capable of sation for the average current loop stability during high level 0.5mA Drive. current regulation. Typical compensation values are 15k
CTRL_T (Pin 4/Pin 6):
The thermal control input to reduce to 80k for the resistor and 2nF to 10nF for the capacitor. the regulated current level for both current levels (CTRL_L
RT (Pin 15/Pin 17):
A resistor to ground sets the switching and CTRL_H). frequency between 200kHz and 1MHz. When using the
CTRL_H (Pin 6/Pin 8):
The CTRL_H pin sets the high level SYNC function, set the frequency to be 20% lower than regulated output current and overcurrent. The maximum the SYNC pulse frequency. This pin is current limited to input voltage is internally clamped to 1.5V. The overcur- 60µA. Do not leave this pin open. rent set point is equal to the high level regulated current
SYNC (Pin 16/Pin 18):
Frequency Synchronization Pin. level set by the CTRL_H pin with an additional 23mV offset This pin allows the switching frequency to be synchronized between the SENSE+ and SENSE– pins. to an external clock. The RT resistor should be chosen to
CTRL_L (Pin 7/Pin 9):
The CTRL_L pin sets the low level operate the internal clock at 20% slower than the SYNC regulated output current. It is not recommended that the pulse frequency. The synchronization range is 240kHz to CTRL_L voltage be higher than the CTRL_H voltage. 1.2MHz. This pin should be grounded when not in use.
SS (Pin 8/Pin 10):
Soft-Start Pin. Place an external capaci-
CTRL_SEL (Pin 17/Pin 19):
The CTRL_SEL pin selects tor to ground to limit the regulated current during start-up between the high current control, CTRL_H and the low conditions. The SS pin has a 5.5µA charging current. This current control, CTRL_L. When high, the VCH pin is con- pin controls both of the regulated inputs determined by nected to the error amp output and the PWMGH gate CTRL_L and CTRL_H. signal is high. When low, the VCL pin is connected to the error amp output and the PWMGL gate signal is high. This
FB (Pin 10/Pin 12):
Feedback Pin for Overvoltage Protec- pin is used for current level dimming of the LED. This pin tion. The feedback voltage is 1V. Overvoltage/Open LED should be grounded when not in use. is sensed through the FB pin. When the feedback voltage exceeds 1.3V, the overvoltage lockout prevents switch-
PWM (Pin 18/Pin 20):
The input pin for PWM dimming ing and connects both output capacitors to discharge the of the LED. When low, all switching is terminated and the inductor current. output caps are disconnected. This pin should be pulled to VCC_INT when not in use.
SENSE+ (Pin 11/Pin 13):
SENSE+ is the inverting input of the average current mode loop error amplifier. This pin is
PWMGH (Pin 19/Pin 21):
The PWMGH output pin drives connected to the external current sense resistor, R the gate of an external FET to connect one of the switching S. The voltage drop between SENSE+ and SENSE– referenced to regulator output capacitors to the load. The driver pull-up the voltage drop across an internal resistor produces the impedance is 3.2Ω and pull-down impedance is 1.75Ω. input voltages to the current regulation loop. 3743fe For more information www.linear.com/LT3743 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
