Datasheet AD7091R-5 (Analog Devices)

4-Channel, I2C, Ultralow Power, 12-Bit ADC in 20-Lead LFCSP/TSSOP Data Sheet AD7091R-5 FEATURES FUNCTIONAL BLOCK DIAGRAM I2C-compatible serial interface supports standard and REFIN/ MUXOUT ADCIN VDD REFOUT REGCAP fast modes Ultralow power: 90 µW typical at 3 V in fast mode Specified for V 2.5V DD of 2.7 V to 5.25 V VREF On-chip accurate 2.5 V reference, 5 ppm/°C typical drift VIN0 12-BIT V SUCCESSIVE 4 single-ended analog input channels IN1 INPUT T/H APPROXIMATION MUX V ADC ALERT function IN2 VIN3 BUSY function ON-CHIP Autocycle mode RESET OSC CHANNEL CONVST/GPO1 Wide input bandwidth SEQUENCER CONTROL SDA 68 dB signal-to-noise ratio (SNR) typical at input LOGIC SCL I2C INTERFACE frequency of 1 kHz AS0 AS Flexible power/throughput rate management 1 AD7091R-5 VDRIVE No pipeline delays Power-down mode
001
GND ALERT/BUSY/ GPO 550 nA typical at V 2 GND DD = 5.25 V GPO0
12093-
435 nA typical at VDD = 3 V
Figure 1.
20-lead LFCSP and TSSOP packages Temperature range: −40°C to +125°C APPLICATIONS Battery-powered systems Personal digital assistants Medical instruments Mobile communications Instrumentation and control systems Data acquisition systems Optical sensors Diagnostic/monitoring functions GENERAL DESCRIPTION
The AD7091R-5 is a 12-bit, multichannel, ultralow power, succes- The AD7091R-5 offers four single-ended analog input channels sive approximation analog-to-digital converter (ADC). The with a channel sequencer that allows a preprogrammed AD7091R-5 operates from a single 2.7 V to 5.25 V power supply selection of channels to be converted sequential y. and typical y consumes only 24 µA at a 3 V supply in fast mode. The AD7091R-5 uses advanced design techniques to achieve The AD7091R-5 provides a 2-wire serial interface compatible ultralow power dissipation without compromising performance. It with I2C interfaces. The conversion process can be control ed by also features flexible power management options. An on-chip a sample mode via the CONVST/GPO1 pin, an autocycle mode configuration register al ows the user to set up different operating selected through software control, or a command mode in conditions. These include power management, alert functionality, which conversions occur across I2C write operations. busy indication, channel sequencing, and general-purpose output The device contains a wide bandwidth track-and-hold amplifier pins. The MUXOUT and ADCIN pins al ow signal conditioning of the that can handle input frequencies up to 1.5 MHz. The AD7091R-5 multiplexer output before acquisition by the ADC. also features an on-chip conversion clock, an on-chip accurate 2.5 V reference, and a programmable out of bounds user alert function.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION REFERENCE POWER SUPPLY DEVICE RESET ANALOG INPUT DRIVER AMPLIFIER CHOICE TYPICAL CONNECTION DIAGRAM I2C REGISTERS ADDRESSING REGISTERS SLAVE ADDRESS I2C REGISTER ACCESS CONVERSION RESULT REGISTER CHANNEL REGISTER CONFIGURATION REGISTER ALERT INDICATION REGISTER CHANNEL x LOW LIMIT REGISTER CHANNEL x HIGH LIMIT REGISTER CHANNEL x HYSTERESIS REGISTER I2C INTERFACE SERIAL BUS ADDRESS BYTE GENERAL I2C TIMING WRITING TO THE AD7091R-5 WRITING TWO BYTES OF DATA TO A 16-BIT REGISTER WRITING TO MULTIPLE REGISTERS READING DATA FROM THE AD7091R-5 READING TWO BYTES OF DATA FROM A 16-BIT REGISTER MODES OF OPERATION SAMPLE MODE COMMAND MODE AUTOCYCLE MODE POWER-DOWN MODE ALERT BUSY CHANNEL SEQUENCER OUTLINE DIMENSIONS ORDERING GUIDE