Datasheet AD7682, AD7689 (Analog Devices) - 29

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Data Sheet AD7682/AD7689 GENERAL TIMING WITH A BUSY INDICATOR
these are usual y limited to 8-bit or 16-bit bursts; therefore, Figure 40 details the timing for all three modes: RDC, RAC, and the LSB remains. Because the transition noise of the AD7682/ RSC. Note that the gating item for both CFG and data readback AD7689 is 4 LSBs peak-to-peak (or greater), the LSB is low 50% is at EOC. The data access must occur up to safe data of the time. For this interface, the SPI host needs to burst reading/writing time, t 24 SCKs, or a QSPI interface can be used and programmed for DATA. If the ful CFG word is not written to prior to EOC, it is discarded and the current configuration 17 SCKs. remains. The SCK can idle high or low depending on the CPOL and At the EOC, if CNV is low, the busy indicator enables. In CPHA settings if SPI is used. A simple solution is to use CPOL = addition, to generate the busy indicator properly, the host must CPHA = 1 (not shown) with SCK idling high. assert a minimum of 17 SCK falling edges to return SDO to From power-up, in any read/write mode, the first three conver- high impedance because the last bit on SDO remains active. sion results are undefined because a valid CFG does not take Unlike the case detailed in the Read/Write Spanning place until the second EOC; thus, two dummy conversions are Conversion Without a Busy Indicator section, if the conversion required. Also, if the state machine writes the CFG during the result is not read out fully prior to EOC, the last bit clocked out power-up state (RDC shown), the CFG register needs to be remains. If this bit is low, the busy signal indicator cannot be rewritten again at the next phase. The first valid data occurs in generated because the busy generation requires either a high phase (n + 1) when the CFG register is written during phase impedance or a remaining bit high-to-low transition. A good (n − 1). example of this occurs when an SPI host sends 16 SCKs because
START OF CONVERSION (SOC) tCYC EOC EOC EOC POWER EOC UP tCONV tDATA CONVERSION ACQUISITION CONVERSION ACQUISITION CONVERSION ACQUISITION CONVERSION ACQUISITION PHASE (n – 2) UNDEFINED (n – 1) UNDEFINED (n – 1) UNDEFINED (n) (n) (n + 1) (n + 1) (n + 2) CNV NOTE 1 DIN XXX CFG (n) CFG (n + 1) CFG (n + 2) RDC SDO SCK 1 17 1 17 1 17 1 17 NOTE 2 CNV NOTE 1 DIN CFG (n) CFG (n + 1) CFG (n + 2) CFG (n + 3) RAC SDO DATA (n) DATA (n + 1) 17 17 17 SCK 1 1 1 1 NOTE 2 CNV NOTE 1 DIN CFG (n) CFG (n + 1) CFG (n + 2) CFG (n + 3) RSC SDO DATA (n) DATA (n) DATA (n + 1) SCK 1 n n + 1 17 1 n n + 1 17 1 n n + 1 17 1 NOTE 2 NOTES 1. CNV MUST BE LOW PRIOR TO THE END OF CONVERSION (EOC) TO GENERATE THE BUSY INDICATOR.
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2. A TOTAL OF 17 SCK FALLING EDGES ARE REQUIRED TO RETURN SDO TO HIGH-Z. IF CFG READBACK IS ENABLED, A TOTAL OF 31 SCK FALLING EDGES IS REQUIRED TO RETURN SDO TO HIGH-Z.
07353- Figure 40. General Interface Timing for the AD7682/AD7689 With a Busy Indicator Rev. H | Page 29 of 35 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview Converter Operation Transfer Functions Typical Connection Diagrams Unipolar or Bipolar Bipolar Single Supply Analog Inputs Input Structure Selectable Low-Pass Filter Input Configurations Sequencer Source Resistance Driver Amplifier Choice Voltage Reference Output/Input Internal Reference/Temperature Sensor External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Supplying the ADC from the Reference Digital Interface Reading/Writing During Conversion, Fast Hosts Reading/Writing After Conversion, Any Speed Hosts Reading/Writing Spanning Conversion, Any Speed Host Configuration Register, CFG General Timing Without a Busy Indicator General Timing with a Busy Indicator Channel Sequencer Examples Read/Write Spanning Conversion Without a Busy Indicator Read/Write Spanning Conversion with a Busy Indicator Applications Information Layout Evaluating the AD7682/AD7689 Performance Outline Dimensions Ordering Guide