Datasheet AD7763 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 24-Bit, 625 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers, Serial Interface |
| Pages / Page | 33 / 7 — AD7763. Data Sheet. TIMING DIAGRAMS. FSO (O). SCO (O). t3B. t3A. DRDY … |
| Revision | B |
| File Format / Size | PDF / 652 Kb |
| Document Language | English |
AD7763. Data Sheet. TIMING DIAGRAMS. FSO (O). SCO (O). t3B. t3A. DRDY (O). t10. SDO (O)
Model Line for this Datasheet
Text Version of Document
AD7763 Data Sheet TIMING DIAGRAMS t4 FSO (O) t t 4B 4A t1 SCO (O) t3B t2 t3A DRDY (O) t3 t10 t5 t6 t7 SDO (O) D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 ST6 ST5 ST4 ST3 ST2 ST1 ST0 t t 8 9 SDL (O) t
002
15
05476- Figure 2. SPI® Interface Serial Read Timing Diagram
32 × tSCO SCO (O) t1 t t 2 14 FSI (I) t t 11 t 13 12 SDI (I) ALL ADR2 ADR1 ADR0 RA11 RA10 RA1 RA0 D15 D14 D1 D0
003 05476- Figure 3. Register Write
32 × tSCO 32 × tSCO 32 × tSCO 32 × tSCO SCO (O) DRDY A (O) SDO (O) SERIAL DATA FROM ADC A SERIAL DATA FROM ADC B SERIAL DATA FROM ADC C SERIAL DATA FROM ADC D FSO A FSO B FSO C FSO D
004 05476- Figure 4. SPI Interface Serial Read Timing with Multiple AD7763 Devices Sharing the Serial Bus Rev. B | Page 6 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide
002
15
05476- Figure 2. SPI® Interface Serial Read Timing Diagram
32 × tSCO SCO (O) t1 t t 2 14 FSI (I) t t 11 t 13 12 SDI (I) ALL ADR2 ADR1 ADR0 RA11 RA10 RA1 RA0 D15 D14 D1 D0
003 05476- Figure 3. Register Write
32 × tSCO 32 × tSCO 32 × tSCO 32 × tSCO SCO (O) DRDY A (O) SDO (O) SERIAL DATA FROM ADC A SERIAL DATA FROM ADC B SERIAL DATA FROM ADC C SERIAL DATA FROM ADC D FSO A FSO B FSO C FSO D
004 05476- Figure 4. SPI Interface Serial Read Timing with Multiple AD7763 Devices Sharing the Serial Bus Rev. B | Page 6 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide
