Datasheet AD7273, AD7274 (Analog Devices) - 10

ManufacturerAnalog Devices
Description3 MSPS 12-Bit A/D Converter in TSOT and MSOP Packages
Pages / Page28 / 10 — AD7273/AD7274. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VDD 1. AGND. …
File Format / SizePDF / 410 Kb
Document LanguageEnglish

AD7273/AD7274. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VDD 1. AGND. VIN. AD7273/. SDATA. DGND. AD7274. SCLK. TOP VIEW. (Not to Scale)

AD7273/AD7274 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 AGND VIN AD7273/ SDATA DGND AD7274 SCLK TOP VIEW (Not to Scale)

Model Line for this Datasheet

Text Version of Document

AD7273/AD7274 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 8 AGND VDD 1 8 VIN AD7273/ AD7273/ SDATA 2 7 CS SDATA 2 7 DGND AD7274 AD7274 DGND 3 6 SCLK CS 3 6 SCLK TOP VIEW TOP VIEW (Not to Scale) AGND V V 4 (Not to Scale) 5 V 4 5 REF IN REF
04973-008 04973-009 Figure 8. 8-Lead MSOP Pin Configuration Figure 9. 8-Lead TSOT Pin Configuration
Table 6. Pin Function Descriptions Pin No. MSOP TSOT Mnemonic Description
1 1 VDD Power Supply Input. The VDD range for the AD7273/AD7274 is from 2.35 V to 3.6 V. 2 2 SDATA Data Out. Logic output. The conversion result from the AD7273/AD7274 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7274 consists of two leading zeros followed by the 12 bits of conversion data and two trailing zeros, provided MSB first. The data stream from the AD7273 consists of two leading zeros followed by the 10 bits of conversion data and four trailing zeros, provided MSB first. 3 7 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversion on the AD7273/AD7274 and framing the serial data transfer. 4 8 AGND Analog Ground. Ground reference point for all circuitry on the AD7273/AD7274. All analog signals and any external reference signal should be referred to this AGND voltage. 5 5 VREF Voltage Reference Input. This pin becomes the reference voltage input. An external reference should be applied at this pin. The external reference input range is 1.4 V to VDD. A 10 μF capacitor should be tied between this pin and AGND. 6 6 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the conversion process of AD7273/AD7274. 7 3 DGND Digital Ground. Ground reference point for all digital circuitry on the AD7273/AD7274. The DGND and AGND voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a transient basis. 8 4 VIN Analog Input. Single-ended analog input channel. The input range is 0 to VREF. Rev. 0 | Page 10 of 28 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AD7274 SPECIFICATIONS AD7273 SPECIFICATIONS TIMING SPECIFICATIONS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE PARTIAL POWER-DOWN MODE FULL POWER-DOWN MODE POWER-UP TIMES POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7273/AD7274 to ADSP-BF53x APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE AD7273/AD7274 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE