Datasheet AD7623 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 16-Bit, 1.33 MSPS PulSAR® A/D Converter |
| Pages / Page | 29 / 8 — AD7623. ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating. ESD CAUTION |
| File Format / Size | PDF / 449 Kb |
| Document Language | English |
AD7623. ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating. ESD CAUTION
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AD7623 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating
Stresses above those listed under Absolute Maximum Ratings Analog Inputs/Outputs may cause permanent damage to the device. This is a stress IN+1, IN−, REF, REFBUFIN, TEMP, AVDD + 0.3 V to rating only; functional operation of the device at these or any INGND, REFGND to AGND AGND − 0.3 V other conditions above those indicated in the operational Ground Voltage Differences section of this specification is not implied. Exposure to absolute AGND, DGND, OGND ±0.3 V maximum rating conditions for extended periods may affect Supply Voltages device reliability. AVDD, DVDD –0.3 V to +2.7 V OVDD –0.3 V to +3.8 V AVDD to DVDD ±2.8 V AVDD to OVDD +2.8 V to −3.8 V OVDD to DVDD2 ≤ +0.3 V if DVDD < 2.3 V Digital Inputs −0.3 V to +5.5 V PDREF, PDBUF3 ±20 mA Internal Power Dissipation4 700 mW Internal Power Dissipation5 2.5 W Junction Temperature 125°C Storage Temperature Range –65°C to +125°C 1 See the Analog Inputs section. 2 See the Power Supply section. 3 See the Voltage Reference Input section. 4 Specification is for the device in free air: 48-Lead LQFP; θJA = 91°C/W, θJC = 30°C/W. 5 Specification is for the device in free air: 48-Lead LFCSP; θJA = 26°C/W.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 7 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS SERIAL CLOCK TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE Single-to-Differential Driver VOLTAGE REFERENCE INPUT Internal Reference (PDBUF = Low, PDREF = Low) External 1.2 V Reference and Internal Buffer (PDREF = High, PBBUF = Low) External Reference (PDBUF = High, PRBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLY Power Sequencing Power-Up POWER DISSIPATION VS. THROUGHPUT CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Previous Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION LAYOUT EVALUATING THE AD7623 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
AD7623 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating
Stresses above those listed under Absolute Maximum Ratings Analog Inputs/Outputs may cause permanent damage to the device. This is a stress IN+1, IN−, REF, REFBUFIN, TEMP, AVDD + 0.3 V to rating only; functional operation of the device at these or any INGND, REFGND to AGND AGND − 0.3 V other conditions above those indicated in the operational Ground Voltage Differences section of this specification is not implied. Exposure to absolute AGND, DGND, OGND ±0.3 V maximum rating conditions for extended periods may affect Supply Voltages device reliability. AVDD, DVDD –0.3 V to +2.7 V OVDD –0.3 V to +3.8 V AVDD to DVDD ±2.8 V AVDD to OVDD +2.8 V to −3.8 V OVDD to DVDD2 ≤ +0.3 V if DVDD < 2.3 V Digital Inputs −0.3 V to +5.5 V PDREF, PDBUF3 ±20 mA Internal Power Dissipation4 700 mW Internal Power Dissipation5 2.5 W Junction Temperature 125°C Storage Temperature Range –65°C to +125°C 1 See the Analog Inputs section. 2 See the Power Supply section. 3 See the Voltage Reference Input section. 4 Specification is for the device in free air: 48-Lead LQFP; θJA = 91°C/W, θJC = 30°C/W. 5 Specification is for the device in free air: 48-Lead LFCSP; θJA = 26°C/W.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 7 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS SERIAL CLOCK TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE Single-to-Differential Driver VOLTAGE REFERENCE INPUT Internal Reference (PDBUF = Low, PDREF = Low) External 1.2 V Reference and Internal Buffer (PDREF = High, PBBUF = Low) External Reference (PDBUF = High, PRBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLY Power Sequencing Power-Up POWER DISSIPATION VS. THROUGHPUT CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Previous Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION LAYOUT EVALUATING THE AD7623 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
