Datasheet AD7490 (Analog Devices) - 8

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Data Sheet AD7490 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 9 10 11 12 13 14 IN IN IN IN IN IN V NC V V V V V V NC IN11 1 28 VIN12 32 31 30 29 28 27 26 25 VIN10 2 27 VIN13 VIN9 3 26 VIN14 NC 1 24 VIN15 NC 4 25 VIN15 V 2 23 NC IN8 V V 3 22 AGND IN8 5 24 AGND IN7 AD7490 AD7490 V 4 21 REF IN6 IN VIN7 6 23 REF TOP VIEW TOP VIEW IN V 5 20 V IN5 (Not to Scale) DD VIN6 7 (Not to Scale) 22 VDD V 6 19 AGND IN4 V V 7 18 CS IN5 8 21 AGND IN3 NC 8 17 DIN VIN4 9 20 CS VIN3 10 19 DIN 9 10 11 12 13 14 15 16 V 2 1 0 E IN2 11 18 NC K IN IN IN ND UT V NC V V V V CL IN1 12 17 VDRIVE AG DO S DRIV VIN0 13 16 SCLK NOTES AGND 14 15 DOUT 1. NC = NO CONNECT. ALL NC PINS SHOULD BE CONNECTED STRAIGHT
032
TO AGND. NC = NO CONNECT 2. CONNECT EXPOSED PAD TO GND
003 02691-
ALL NC PINS SHOULD BE
02691-
CONNECTED STRAIGHT TO AGND
Figure 3. 28-Lead TSSOP Pin Configuration Figure 4. 32-Lead LFCSP Pin Configuration
Table 4. Pin Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
20 18 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7490 and also frames the serial data transfer. 23 21 REFIN Reference Input for the AD7490. An external reference must be applied to this input. The voltage range for the external reference is 2.5 V ± 1% for specified performance. 22 20 VDD Power Supply Input. The VDD range for the AD7490 is from 2.7 V to 5.25 V. For the 0 V to 2 × REFIN range, VDD should be from 4.75 V to 5.25 V. 14, 21, 24 12, 19, 22 AGND Analog Ground. Ground reference point for all circuitry on the AD7490. All analog/digital input signals and any external reference signal should be referred to this AGND voltage. All AGND pins should be connected together. 13 to 5, 11 to 9, VIN0 to VIN15 Analog Input 0 through Analog Input 15. Sixteen single-ended analog input channels that are 3 to 1, 7 to 2, multiplexed into the on chip track-and-hold. The analog input channel to be converted is 28 to 25 31 to 26, selected by using the address bits ADD3 through ADD0 of the control register. The address bits, 24 in conjunction with the SEQ and SHADOW bits, allow the sequence register to be programmed. The input range for all input channels can extend from 0 V to REFIN or 0 V to 2 × REFIN as selected via the RANGE bit in the control register. Any unused input channels should be connected to AGND to avoid noise pickup. 19 17 DIN Data In. Logic input. Data to be written to the control register of the AD7490 is provided on this input and is clocked into the register on the falling edge of SCLK (see the Control Register section). 15 13 DOUT Data Out. Logic output. The conversion result from the AD7490 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream consists of four address bits indicating which channel the conversion result corresponds to, followed by the 12 bits of conversion data, which is provided by MSB first. The output coding can be selected as straight binary or twos complement via the CODING bit in the control register. 16 14 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the conversion process of the AD7490. 17 15 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial interface of the AD7490 operates. N/A EP EPAD Exposed Pad. Connect exposed pad to GND. Rev. D | Page 7 of 28 Document Outline Features Functional Block Diagram General Description Product Highlights Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Internal Register Structure Control Register Sequencer Operation Shadow Register Theory of Operation Circuit Information Converter Operation Analog Input ADC Transfer Function Handling Bipolar Input Signals Typical Connection Diagram Analog Input Channels Digital Input VDRIVE Reference Section Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) Auto Shutdown (PM1 = 0, PM0 = 1) Auto Standby (PM1 = PM0 = 0) Powering Up the AD7490 Serial Interface Power vs. Throughput Rate Microprocessor Interfacing AD7490 to TMS320C541 AD7490 to ADSP-21xx AD7490 to DSP563xx Application Hints Grounding and Layout PCB Design Guidelines for Chip Scale Package Evaluating the AD7490 Performance Outline Dimensions Ordering Guide