link to page 5 AD9433Test105 MSPS125 MSPSParameter TempLevelMinTypMaxMinTypMaxUnit DIGITAL OUTPUTS Logic 1 Voltage Full VI VDD − 0.05 VDD − 0.05 V Logic 0 Voltage Full VI 0.05 0.05 V Output Coding Twos complement or offset binary Twos complement or offset binary 1 Gain error and gain temperature coefficients are based on the ADC only (with a fixed 2.5 V external reference and a 2 V p-p differential analog input). 2 SFDR mode disabled (SFDR MODE = GND) for DNL and INL specifications. 3 Power dissipation measured with rated encode and a dc analog input (outputs static, IVDD = 0). IVCC and IVDD measured with 10.3 MHz analog input @ −0.5 dBFS. AC SPECIFICATIONS VDD = 3.3 V, VCC = 5 V; differential encode input, unless otherwise noted. Table 2.Test105 MSPS125 MSPSParameterTempLevelMinTypMaxMinTypMaxUnit DYNAMIC PERFORMANCE1 Signal-to-Noise Ratio (SNR) (Without Harmonics) fIN = 10.3 MHz 25°C I 66.5 68.0 66.0 67.7 dB fIN = 49 MHz 25°C I 65.5 67.5 64.0 66.0 dB fIN = 70 MHz 25°C V 67.0 65.4 dB fIN = 150 MHz 25°C V 65.4 62.0 dB fIN = 250 MHz 25°C V 63.7 60.0 dB Signal-to-Noise and Distortion (SINAD) Ratio (with Harmonics) fIN = 10.3 MHz 25°C I 66.0 68.0 65.0 67.0 dB fIN = 49 MHz 25°C I 64.0 67.5 63.5 65.5 dB fIN = 70 MHz 25°C V 66.9 64.5 dB fIN = 150 MHz 25°C V 64.0 61.5 dB fIN = 250 MHz 25°C V 61.2 57.7 dB Effective Number of Bits (ENOB) fIN = 10.3 MHz 25°C I 11.1 10.9 Bits fIN = 49 MHz 25°C I 11.0 10.7 Bits fIN = 70 MHz 25°C V 10.9 10.6 Bits fIN = 150 MHz 25°C V 10.4 10.0 Bits fIN = 250 MHz 25°C V 9.9 9.4 Bits Second-Order and Third-Order Harmonic Distortion fIN = 10.3 MHz 25°C I −78 −85 −76 −85 dBc fIN = 49 MHz 25°C I −73 −80 −72 −76 dBc fIN = 70 MHz 25°C V −83 −78 dBc fIN = 150 MHz 25°C V −72 −67 dBc fIN = 250 MHz 25°C V −67 −65 dBc Worst Other Harmonic or Spur (Excluding Second-Order and Third-Order Harmonics) fIN = 10.3 MHz 25°C I −88 −92 −84 −90 dBc fIN = 49 MHz 25°C I −82 −89 −82 −87 dBc fIN = 70 MHz 25°C V −87 −85 dBc fIN = 150 MHz 25°C V −87 −84 dBc fIN = 250 MHz 25°C V −85 −76 dBc Two-Tone Intermodulation Distortion (IMD3) fIN1 = 49.3 MHz; fIN2 = 50.3 MHz 25°C V −92 −90 dBc fIN1 = 150 MHz; fIN2 = 151 MHz 25°C V −80 −76 dBc 1 SNR/harmonics based on an analog input voltage of −0.5 dBFS referenced to a 2 V full-scale input range. Harmonics are specified with the SFDR mode enabled (SFDR MODE = 5 V). SNR/SINAD specified with the SFDR mode disabled (SFDR MODE = ground). Rev. A | Page 4 of 20 Document Outline FEATURES APPLICATIONS GENERAL INTRODUCTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY EQUIVALENT CIRCUITS THEORY OF OPERATION ENCODE INPUT ENCODE VOLTAGE LEVEL DEFINITION ANALOG INPUT SFDR OPTIMIZATION DIGITAL OUTPUTS VOLTAGE REFERENCE TIMING APPLICATIONS INFORMATION LAYOUT INFORMATION REPLACING THE AD9432 WITH THE AD9433 OUTLINE DIMENSIONS ORDERING GUIDE