link to page 19 AD7475/AD7495Data SheetParameterA Version1B Version 1 UnitTest Conditions/Comments POWER REQUIREMENTS VDD 2.7/5.25 2.7/5.25 V min/max VDRIVE 2.7/5.25 2.7/5.25 V min/max I 3 DD Digital inputs = 0 V or VDRIVE Normal Mode (Static) 750 750 µA typ VDD = 2.7 V to 5.25 V, SCLK on or off Normal Mode (Operational) 2.1 2.1 mA max VDD = 4.75 V to 5.25 V, fSAMPLE = 1 MSPS 1.5 1.5 mA max VDD = 2.7 V to 3.6 V, fSAMPLE = 1 MSPS Partial Power-Down Mode 450 450 µA typ fSAMPLE = 100 kSPS Partial Power-Down Mode 100 100 µA max Static Full Power-Down Mode 1 1 µA max SCLK on or off Power Dissipation3 Normal Mode (Operational) 10.5 10.5 mW max VDD = 5 V, fSAMPLE = 1 MSPS 4.5 4.5 mW max VDD = 3 V, fSAMPLE = 1 MSPS Partial Power-Down (Static) 500 500 µW max VDD = 5 V 300 300 µW max VDD = 3 V Full Power-Down 5 5 µW max VDD = 5 V 3 3 µW max VDD = 3 V 1 Temperature ranges for A, B versions: −40°C to +85°C. 2 Guaranteed by initial characterization. 3 See the Power vs. Throughput Rate section. Rev. C | Page 4 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY AD7475 SPECIFICATIONS AD7495 SPECIFICATIONS TIMING EXAMPLE 1 TIMING EXAMPLE 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Inputs VDRIVE Reference Section OPERATING MODES NORMAL MODE PARTIAL POWER-DOWN MODE Power-Up Time FULL POWER-DOWN MODE POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7475/AD7495 TO TMS320C5x/C54x AD7475/AD7495 TO ADSP-21xx AD7475/AD7495 TO DSP56xxx AD7475/AD7495 TO MC68HC16 OUTLINE DIMENSIONS ORDERING GUIDE