Datasheet AD7898 (Analog Devices) - 6

AD7898 PIN FUNCTION DESCRIPTIONS Pin Pin No. Mnemonic Function
1 REF IN Voltage Reference Input. An external reference source should be connected to this pin to provide the reference voltage for the AD7898’s conversion process. The REF IN input is buffered on-chip. The nominal reference voltage for correct operation of the AD7898 is 2.5 V ± 5%. A 0.1 µF capacitor should be placed on the REF IN pin. 2 VIN Analog Input Channel. The analog input range is ± 10 V (AD7898-10) and ± 2.5 V (AD7898-3). 3 GND Analog Ground. Ground reference for track/hold, comparator, digital circuitry, and DAC. 4 SCLK Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7898. When in Mode 0 operation, a new serial data bit is clocked out on the falling edge of this serial clock. In Mode 0, data is guaranteed valid for 20 ns after this falling edge so that data can be accepted on the falling edge when a fast serial clock is used. The serial clock input should be taken low at the end of the serial data transmission. When in Mode 1 operation, SCLK also provides the serial clock for accessing data from the part as in Mode 0, but this clock input is also used as the clock source for the AD7898’s conversion process when in Mode 1. 5 SDATA Serial Data Output. Serial data from the AD7898 is provided at this output. The serial data is clocked out by the falling edge of SCLK, but the data can also be read on the falling edge of SCLK. This is possible because data bit N is valid for a specified time after the falling edge of SCLK (data hold time). Sixteen bits of serial data are provided with four leading zeros followed by the 12 bits of conversion data, which is provided MSB first. On the 16th falling edge of SCLK, the SDATA line is held for the data hold time and then is disabled (three-stated). Output data coding is two’s complement for the AD7898. 6 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial inter- face of the AD7898 will operate. 7 CS/CONVST Chip Select/Convert Start. This pin is CONVST, an edge-triggered logic input when in Mode 0 operation. On the falling edge of this input, the track/hold goes into its hold mode, and conversion is initiated. When in Mode 1 operation, this pin is Chip Select, an active low logic input. This input provides the dual function of initiating conversions on the AD7898 and also frames the serial data transfer. 8 VDD Power Supply Input, 5 V ± 5%. REV. A –5– Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Signal to (Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion Relative Accuracy Differential Nonlinearity Positive Full-Scale Error (AD7898-10) Positive Full-Scale Error (AD7898-3) Bipolar Zero Error (AD7898-10, AD7898-3) Negative Full-Scale Error (AD7898-10) Negative Full-Scale Error (AD7898-3) Track/Hold Acquisition Time PSR (Power Supply Rejection) PERFORMANCE CURVES Noise CONVERTER DETAILS CIRCUIT DESCRIPTION Analog Input Section Acquisition Time TYPICAL CONNECTION DIAGRAM VDRIVE Feature Track/Hold Section Reference Input SERIAL INTERFACE OPERATING MODES Mode 0 Operation Mode 1 Operation Mode Selection Power-Down Mode Power-Up Times MICROPROCESSOR/MICROCONTROLLER INTERFACE FOR MODE 0 OPERATION 8x51/L51 to AD7898 Interface 68HC11/L11 to AD7898 Interface ADSP-2103/ADSP-2105 to AD7898 Interface DSP56002/L002 to AD7898 Interface MICROPROCESSOR INTERFACING FOR MODE 1 TMS320C5x/C54x to AD7898 Interface AD7898 to ADSP-21xx Interface AD7898 to DSP56xxx Interface AD7898 to MC68HC16 Interface OUTLINE DIMENSIONS Revision History