Datasheet AD7664 (Analog Devices) - 3

AD7664–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range VIN – VINGND 0 VREF V Operating Input Voltage VIN –0.1 +3 V VINGND –0.1 +0.5 V Analog Input CMRR fIN = 10 kHz 62 dB Input Current 570 kSPS Throughput 7 µA Input Impedance See Analog Input Section THROUGHPUT SPEED Complete Cycle In Warp Mode 1.75 µs Throughput Rate In Warp Mode 1 570 kSPS Time between Conversions In Warp Mode 1 ms Complete Cycle In Normal Mode 2 µs Throughput Rate In Normal Mode 0 500 kSPS Complete Cycle In Impulse Mode 2.25 µs Throughput Rate In Impulse Mode 0 444 kSPS DC ACCURACY Integral Linearity Error –2.5 +2.5 LSB1 Differential Linearity Error –1 +1.5 LSB No Missing Codes 16 Bits Transition Noise 0.7 LSB Full-Scale Error2 REF = 2.5 V ±0.08 % of FSR Unipolar Zero Error2 ±5 ±15 LSB Power Supply Sensitivity AVDD = 5 V ± 5% ±3 LSB AC ACCURACY Signal-to-Noise fIN = 100 kHz 90 dB3 Spurious-Free Dynamic Range fIN = 45 kHz 100 dB fIN = 100 kHz 100 dB Total Harmonic Distortion fIN = 45 kHz –100 dB fIN = 100 kHz –100 dB Signal-to-(Noise+Distortion) fIN = 45 kHz 90 dB fIN = 100 kHz 89 dB –60 dB Input, fIN = 100 kHz 30 dB –3 dB Input Bandwidth 18 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-Scale Step 250 ns REFERENCE External Reference Voltage Range 2.3 2.5 AVDD – 1.85 V External Reference Current Drain 570 kSPS Throughput 115 µA DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH 2.0 OVDD + 0.3 V IIL –1 +1 µA IIH –1 +1 µA DIGITAL OUTPUTS Data Format Parallel or Serial 16-Bits Pipeline Delay Conversion Results Available Immediately after Completed Conversion VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –500 µA OVDD – 0.6 V POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.25 V Operating Current4 500 kSPS Throughput AVDD 15.5 mA DVDD5 3.8 mA OVDD5 100 µA Power Dissipation5 500 kSPS Throughput4 115 mW 100 SPS Throughput6 21 µW In Power-Down Mode7 7 µW –2– REV. F Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal to (Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Overvoltage Recovery Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS Bipolar and Wider Input Ranges Layout OUTLINE DIMENSIONS Revision History