Datasheet AD7724 (Analog Devices) - 3

ManufacturerAnalog Devices
DescriptionDual, 7th-Order, Sigma-Delta Modulator
Pages / Page17 / 3 — AD7724–SPECIFICATIONS1(AVDD = 5 V. 5%; DVDD = 5 V. 5%, DVDD1 = 3 V. 5%; …
RevisionB
File Format / SizePDF / 322 Kb
Document LanguageEnglish

AD7724–SPECIFICATIONS1(AVDD = 5 V. 5%; DVDD = 5 V. 5%, DVDD1 = 3 V. 5%; AGND = DGND = 0 V,

AD7724–SPECIFICATIONS1(AVDD = 5 V 5%; DVDD = 5 V 5%, DVDD1 = 3 V 5%; AGND = DGND = 0 V,

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AD7724–SPECIFICATIONS1(AVDD = 5 V

5%; DVDD = 5 V

5%, DVDD1 = 3 V

5%; AGND = DGND = 0 V, fMCLK = 13 MHz ac-coupled sine wave, REF2A = REF2B = 2.5 V; TA = TMIN to TMAX, unless otherwise noted.) Parameter A Version Unit Test Conditions/Comments
STATIC PERFORMANCE When Tested with Ideal FIR Filter as in Figure 1 Integral Nonlinearity ±0.003 % FSR typ Offset Error ±0.24 % FSR typ Gain Error2 ±0.6 % FSR typ Offset Error Drift ±37.69 µV/°C typ Gain Error Drift REF2 Is an Ideal Reference, REF1 = AGND Unipolar Mode ±37.69 µV/°C typ Bipolar Mode ±18.85 µV/°C typ ANALOG INPUTS Signal Input Span (VIN(+) – VIN(–)) Bipolar Mode ±VREF2/2 V max BIP = VIH Unipolar Mode 0 to VREF2 V max BIP = VIL Maximum Input Voltage AVDD V Minimum Input Voltage 0 V Input Sampling Capacitance 2 pF typ Input Sampling Rate 2 fMCLK MHz Differential Input Impedance 109/(8 fMCLK) kΩ typ REFERENCE INPUTS REF1 Output Voltage 2.32 to 2.68 V min/max REF1 Output Voltage Drift 60 ppm/°C typ REF1 Output Impedance 4 kΩ typ Reference Buffer Offset Voltage ±12 mV max Offset Between REF1 and REF2 Using Internal Reference REF2 Output Voltage 2.32 to 2.68 V min/max REF2 Output Voltage Drift 60 ppm/°C typ Using External Reference REF1 = AGND REF2 Input Impedance 109/(16 fMCLK) kΩ typ External Reference Voltage Range 2.32 to 2.68 V min/max Applied to REF1 or REF2 DYNAMIC SPECIFICATIONS3 When Tested with Ideal FIR Filter as in Figure 1 Bipolar Mode BIP = VIH, VCM = 2.5 V, VIN(+) = VIN(–) = 1.25 V p-p or VIN(–) = 1.25 V, VIN(+) = 0 V to 2.5 V Signal-to-(Noise + Distortion) 90 dB typ Input BW = 0 kHz–94.25 kHz 86 dB min Total Harmonic Distortion –90 dB max Input BW = 0 kHz–94.25 kHz Spurious Free Dynamic Range –90 dB max Input BW = 0 kHz–94.25 kHz Unipolar Mode BIP = VIL, VIN(–) = 0 V, VIN(+) = 0 V to 2.5 V Signal-to-(Noise + Distortion) 88 dB typ Input BW = 0 kHz–94.25 kHz Total Harmonic Distortion –90 dB typ Input BW = 0 kHz–101.556 kHz Spurious Free Dynamic Range –90 dB typ Input BW = 0 kHz–101.556 kHz Intermodulation Distortion –93 dB typ AC CMRR 96 dB typ VIN(+) = VIN(–) = 2.5 V p-p, VCM = 1.25 V to 3.75 V, 20 kHz CLOCK Square Wave4 MCLK Duty Ratio 45 to 55 % max For Specified Operation VMCLKH, MCLK High Voltage 4 V min MCLK Uses CMOS Logic VMCLKL, MCLK Low Voltage 0.4 V max Sine Wave XTAL1 Voltage Swing 0.4 V p-p min XTAL_OFF Tied Low 4 V p-p max LOGIC INPUTS VIH, Input High Voltage 2.4 V min VIL, Input Low Voltage 0.8 V max IINH, Input Current 10 µA max CIN, Input Capacitance 10 pF max –2– REV. B