Datasheet AD7865 (Analog Devices) - 10

AD7865 CONVERTER DETAILS Track/Hold Section
The AD7865 is a high speed, low power, four-channel simulta- The track/hold amplifiers on the AD7865 allows the ADCs to neous sampling 14-bit A/D converter that operates from a single accurately convert an input sine wave of full-scale amplitude to 5 V supply. The part contains a 2.4 µs successive approximation 14-bit accuracy. The input bandwidth of the track/hold is greater ADC, four track/hold amplifiers, an internal 2.5 V reference than the Nyquist rate of the ADC even when the ADC is oper- and a high speed parallel interface. There are four analog inputs ated at its maximum throughput rate of 350 kSPS (i.e., the which can be sampled simultaneously, thus preserving the track/hold can handle input frequencies in excess of 175 kHz). relative phase information of the signals on all four analog inputs. The track/hold amplifiers acquire input signals to 14-bit accu- Thereafter, conversions will be completed on the selected sub- racy in less than 350 ns. The operation of the track/holds are set of the four channels. The part accepts an analog input essentially transparent to the user. The four track/hold amplifi- range of ± 10 V or ± 5 V (AD7865-1), 0 V to 2.5 V or 0 V to 5 V ers sample their respective input channels simultaneously, on (AD7865-2) and ± 2.5 V (AD7865-3). Overvoltage protection the rising edge of CONVST. The aperture time for the track/ on the analog inputs for the part allows the input voltage to go holds (i.e., the delay time between the external CONVST signal to ±18 V (AD7865-1 with ± 10 V input range), ±9 V (AD7865-1 and the track/hold actually going into hold) are typically 15 ns with ± 5 V input range), –1 V to +18 V (AD7865-2) and –4 V to and, more importantly, is well matched across the four track/ +18 V (AD7865-3) without causing damage or effecting the con- holds on one device and also well matched from device to device. version result of another channel. The AD7865 has two operating This allows the relative phase information between different modes Reading Between Conversions and Reading after the Con- input channels to be accurately preserved. It also allows multiple version Sequence. These modes are discussed in more detail in the AD7865s to sample more than four channels simultaneously. At Timing and Control section. the end of a conversion sequence, the part returns to its tracking A conversion is initiated on the AD7865 by pulsing the CONVST mode. The acquisition time of the track/hold amplifiers begins input. On the rising edge of CONVST, all four on-chip track/ at this point. holds are simultaneously placed into hold and the conversion The autozero section of the track/hold circuit is designed to sequence is started on all the selected channels. Channel selec- work with input slew rates of up to 4 × π × (Full-Scale Span). tion is made via the SL1–SL4 pins if H/S SEL is logic zero, or This corresponds to a full-scale sine wave of up to 4 MHz for via the channel select register if H/S SEL is logic one—see any input range. Slew rates above this level within the acquisi- Selecting a Conversion Sequence. The channel select register is tion time may cause an incorrect conversion result to be returned programmed via the bidirectional data lines DB0–DB3 and a from the AD7865. standard write operation. The selected conversion sequence is latched on the rising edge of CONVST so changing a selection
Reference Section
will only take effect once a new conversion sequence is initi- The AD7865 contains a single reference pin, labelled VREF, ated. The BUSY output signal is triggered high on the rising which either provides access to the part’s own 2.5 V reference or edge of CONVST and will remain high for the duration of the allows an external 2.5 V reference to be connected to provide conversion sequence. The conversion clock for the part is gen- the reference source for the part. The part is specified with a erated internally using a laser-trimmed clock oscillator circuit. 2.5 V reference voltage. There is also the option of using an external clock, by tying the The AD7865 contains an on-chip 2.5 V reference. To use this INT/EXT CLK pin logic high and applying an external clock reference as the reference source for the AD7865, simply con- to the CLKIN pin. However, the optimum throughput is obtained nect a 0.1 µF disc ceramic capacitor from the VREF pin to AGND. by using the internally generated clock— see Using an External The voltage that appears at this pin is internally buffered before Clock. The EOC signal indicates the end of each conversion in the being applied to the ADC. If this reference is required for use conversion sequence. The BUSY signal indicates the end of the external to the AD7865, it should be buffered as the part has a full conversion sequence and at this time all four Track and Holds FET switch in series with the reference output, resulting in a return to tracking mode. The conversion results can either be read source impedance for this output of 6 kΩ nominal. The toler- at the end of the full conversion sequence (indicated by BUSY ance on the internal reference is ± 10 mV at 25°C with a typical going low) or as each result becomes available (indicated by EOC temperature coefficient of 25 ppm/°C and a maximum error going low). Data is read from the part via a 14-bit parallel data bus over temperature of ± 20 mV. with standard CS and RD signals—see Timing and Control. If the application requires a reference with a tighter tolerance or Conversion time for each channel of the AD7865 is 2.4 µs and the AD7865 needs to be used with a system reference, the user the track/hold acquisition time is 0.35 µs. To obtain optimum has the option of connecting an external reference to this VREF performance from the part, the read operation should not occur pin. The external reference will effectively overdrive the internal during a channel conversion or during the 100 ns prior to the reference and thus provide the reference source for the ADC. next CONVST rising edge. This allows the part to operate at The reference input is buffered before being applied to the ADC throughput rates up to 100 kHz for all four channels and achieve with the maximum input current of ± 100 µA. Suitable reference data sheet specifications. sources for the AD7865 include the AD680, AD780, REF192 and REF43 precision 2.5 V references. REV. B –9–