Datasheet AD7731 (Analog Devices) - 10

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AD7731 PIN FUNCTION DESCRIPTIONS (Continued) Pin Pin No. Mnemonic Function
20 RDY Logic output. Used as a status output in both conversion mode and calibration mode. In conversion mode, a logic low on this output indicates that a new output word is available from the AD7731 data register. The RDY pin will return high upon completion of a read operation of a full output word. If no data read has taken place after an output update, the RDY line will return high prior to the next output update, remain high while the update is taking place and return low again. This gives an indication of when a read operation should not be initiated to avoid initiating a read from the data register as it is being updated. In calibration mode, RDY goes high when calibration is initiated and returns low to indicate that calibration is complete. A number of different events on the AD7731 set the RDY high and these are outlined in Table XVII. 21 DOUT Serial Data Output with serial data being read from the output shift register on the part. This output shift register can contain information from the calibration registers, mode register, status register, filter register or data register depending on the register selection bits of the Communications Register. 22 DIN Serial Data Input with serial data being written to the input shift register on the part. Data from this input shift register is transferred to the calibration registers, mode register, communications register or filter regis- ter depending on the register selection bits of the Communications Register. 23 DVDD Digital Supply Voltage, +3 V or +5 V nominal. 24 DGND Ground reference point for digital circuitry.
TERMINOLOGY POSITIVE FULL-SCALE OVERRANGE INTEGRAL NONLINEARITY
Positive Full-Scale Overrange is the amount of overhead avail- This is the maximum deviation of any code from a straight line able to handle input voltages on AIN(+) input greater than passing through the endpoints of the transfer function. The end- AIN(–) + VREF/GAIN (for example, noise peaks or excess volt- points of the transfer function are zero scale (not to be confused ages due to system gain errors in system calibration routines) with bipolar zero), a point 0.5 LSB below the first code transi- without introducing errors due to overloading the analog modu- tion (000 . 000 to 000 . 001) and full scale, a point 0.5 LSB lator or overflowing the digital filter. above the last code transition (111 . 110 to 111 . 111). The error is expressed as a percentage of full scale.
NEGATIVE FULL-SCALE OVERRANGE
This is the amount of overhead available to handle voltages on
POSITIVE FULL-SCALE ERROR
AIN(+) below AIN(–) – VREF/GAIN without overloading the Positive Full-Scale Error is the deviation of the last code transi- analog modulator or overflowing the digital filter. tion (111 . 110 to 111 . 111) from the ideal AIN(+) voltage (AIN(–) + V
OFFSET CALIBRATION RANGE
REF/GAIN – 3/2 LSBs). It applies to both unipolar and bipolar analog input ranges. In the system calibration modes, the AD7731 calibrates its offset with respect to the analog input. The Offset Calibration
UNIPOLAR OFFSET ERROR
Range specification defines the range of voltages the AD7731 Unipolar Offset Error is the deviation of the first code transition can accept and still accurately calibrate offset. from the ideal AIN(+) voltage (AIN(–) + 0.5 LSB) when oper- ating in the unipolar mode.
FULL-SCALE CALIBRATION RANGE
This is the range of voltages that the AD7731 can accept in the
BIPOLAR ZERO ERROR
system calibration mode and still accurately calibrate full scale. This is the deviation of the midscale transition (0111 . 111 to 1000 . 000) from the ideal AIN(+) voltage (AIN(–) –
INPUT SPAN
0.5 LSB) when operating in the bipolar mode. In system calibration schemes, two voltages applied in sequence to the AD7731’s analog input define the analog input range.
GAIN ERROR
The input span specification defines the minimum and maxi- This is a measure of the span error of the ADC. It is a measure mum input voltages from zero to full scale that the AD7731 can of the difference between the measured and the ideal span be- accept and still accurately calibrate gain. tween any two points in the transfer function. The two points used to calculate the gain error are positive full scale and nega- tive full scale.
BIPOLAR NEGATIVE FULL-SCALE ERROR
This is the deviation of the first code transition from the ideal AIN(+) voltage (AIN(–) – VREF/GAIN + 0.5 LSB) when operat- ing in the bipolar mode. Negative full-scale error is a summation of zero error and gain error. REV. 0 REV. A –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AD7731-SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Ordering Guide ESD Caution PIN CONFIGURATION Pin Function Descriptions TERMINOLOGY OUTPUT NOISE AND RESOLUTION SPECIFICATION Output Noise (CHP = 0, SKIP= 1) Output Noise (CHP = 1, SKIP = 0) ON-CHIP REGISTERS Communications Register (RS2-RS0 = 0, 0, 0) Status Register (RS2-RS0 = 0, 0, 0); Power-On/Reset Status: CX Hex Data Register (RS2-RS0 = 0, 0, 1); Power On/Reset Status: 000000 Hex Mode Register (RS2-RS0 = 0, 1, 0); Power-On/Reset Status: 0174 Hex Filter Register (RS2-RS0 = 0, 1, 1); Power-On/Reset Status: 2002 Hex Offset Calibration Register (RS2-RS0 = 1, 0, 1) Gain Calibration Register (RS2-RS0 = 1, 1, 0) Test Register (RS2-RS0 = 1, 1, 1); Power On/Reset Status: 000000 Hex READING FROM AND WRITING TO THE ON-CHIP REGISTERS CALIBRATION OPERATION SUMMARY CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Channels Buffered Inputs Analog Input Ranges Programmable Gain Amplifier Bipolar/Unipolar Inputs Burnout Currents REFERENCE INPUT Reference Detect SIGMA-DELTA MODULATOR DIGITAL FILTERING Filter Architecture First State Filter/SKIP Mode Enabled (SKIP =1) Nonchop Mode (SKIP =1, CHP = 0) Chop Mode (SKIP = 1, CHP =1) Second Stage Filter Normal FIR Operation (SKIP = 0) Chop Mode (SKIP = 0, CHP =1) Nonchop Mode (SKIP = 1, CHP = 0) FASTStep Mode (SKIP = 0, FAST = 1) CALIBRATION Internal Zero-Scale Calibration Internal Full-Scale Calibration System Zero-Scale Calibration System Full-Scale Calibration Span and Offset Limits Power-Up and Calibration Drift Considerations USING THE AD7731 Clocking and Oscillator Circuit System Synchronization Single-Shot Conversions Reset Input Standby Mode Digital Outputs POWER SUPPLIES Grounding and Layout Evaluting the AD7731 Performance SERIAL INTERFACE Write Operation Read Operation CONFIGURING THE AD7731 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7731 to 68HC11 Interface AD7731 to 8051 Interface AD7731 to ADSP-2103/ADSP-2105 Interface APPLICATIONS Data Acquisition Programmable Logic Controllers Pressure Measurement Temperature Measurement Bipolar Input Signals PAGE INDEX TABLE INDEX OUTLINE DIMENSIONS