Datasheet AD7711 (Analog Devices) - 5

AD7711–SPECIFICATIONS Parameter A, S Versions1 Unit Conditions/Comments
POWER REQUIREMENTS Power Supply Voltages AVDD Voltage16 5 to 10 V nom ±5% for Specified Performance DVDD Voltage17 5 V nom ±5% for Specified Performance AVDD – VSS Voltage 10.5 V max For Specified Performance Power Supply Currents AVDD Current 4 mA max DVDD Current 4.5 mA max VSS Current 1.5 mA max VSS = –5 V Power Supply Rejection18 Rejection w.r.t. AGND; Assumes VBIAS Is Fixed Positive Supply (AVDD and DVDD) See Note 19 dB typ Negative Supply (VSS) 90 dB typ Power Dissipation Normal Mode 45 mW max AVDD = DVDD = +5 V, VSS = 0 V; Typically 25 mW 52.5 mW max AVDD = DVDD = +5 V, VSS = –5 V; Typically 30 mW Standby (Power-Down) Dissipation 15 mW max AVDD = DVDD = +5 V, VSS = 0 V or –5 V; Typically 7 mW NOTES 16The AD7711 is specified with a 10 MHz clock for AVDD voltages of 5 V ± 5%. It is specified with an 8 MHz clock for AVDD voltages greater than 5.25 V and less than 10.5 V. Operating with AVDD voltages in the range 5.25 V to 10.5 V is only guaranteed over the 0∞C to 70∞C temperature range. 17The ±5% tolerance on the DVDD input is allowed provided DVDD does not exceed AVDD by more than 0.3 V. 18Measured at dc and applies in the selected pass band. PSRR at 50 Hz will exceed 120 dB with filter notches of 10 Hz, 25 Hz, or 50 Hz. PSRR at 60 Hz will exceed 120 dB with filter notches of 10 Hz, 30 Hz, or 60 Hz. 19PSRR depends on gain: Gain of 1 = 70 dB typ; Gain of 2: 75 dB typ; Gain of 4 = 80 dB typ; Gains of 8 to 128 = 85 dB typ. These numbers can be improved (to 95 dB typ) by deriving the VBIAS voltage (via Zener diode or reference) from the AVDD supply. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
REF OUT to AGND . –0.3 V to AVDD (TA = 25∞C, unless otherwise noted.) Digital Input Voltage to DGND . –0.3 V to AVDD + 0.3 V Digital Output Voltage to DGND . –0.3 V to DVDD + 0.3 V AVDD to DVDD . –0.3 V to +12 V Operating Temperature Range AVDD to VSS . –0.3 V to +12 V Commercial (A Version) . –40 AV ∞C to +85∞C DD to AGND . –0.3 V to +12 V Extended (S Version) . –55 AV ∞C to +125∞C DD to DGND . –0.3 V to +12 V Storage Temperature Range . –65 DV ∞C to +150∞C DD to AGND . –0.3 V to +6 V Lead Temperature (Soldering, 10 secs) . 300 DV ∞C DD to DGND . –0.3 V to +6 V Power Dissipation (Any Package) to 75 V ∞C . 450 mW SS to AGND . +0.3 V to –6 V V *Stresses above those listed under Absolute Maximum Ratings may cause perma- SS to DGND . +0.3 V to –6 V nent damage to the device. This is a stress rating only; functional operation of the Analog Input Voltage to AGND device at these or any other conditions above those listed in the operational . VSS – 0.3 V to AVDD + 0.3 V sections of the specification is not implied. Exposure to absolute maximum rating Reference Input Voltage to AGND conditions for extended periods may affect device reliability. VSS – 0.3 V to AVDD + 0.3 V
ORDERING GUIDE Model Temperature Range Package Option*
AD7711AN –40∞C to +85∞C N-24 AD7711AR –40∞C to +85∞C R-24 AD7711AR-REEL –40∞C to +85∞C R-24 AD7711AR-REEL7 –40∞C to +85∞C R-24 AD7711AQ –40∞C to +85∞C Q-24 AD7711SQ –55∞C to +125∞C Q-24 EVAL-AD7711EB Evaluation Board *N = Plastic DIP, Q = CERDIP, R = SOIC.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7711 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– REV. G Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING CHARACTERISTICS PIN FUNCTION DESCRIPTIONS TERMINOLOGY Intergral Nonlinearity Positive Full-Scale Error Unipolar Offset Error Bipolar Zero Error Bipolar Negative Full-Scale Error Positive Full-Scale Overrange Negative Full-Scale Overrange Offset Calibration Range Full-Scale Calibration Range Input Span CONTROL REGISTER (24 BITS) FILTER SELECTION (FS11–FS0) CIRCUIT DESCRIPTION THEORY OF OPERATION Input Sample Rate DIGITAL FILTERING Filter Characteristics Post Filtering Antialias Considerations ANALOG INPUT FUNCTIONS Analog Input Ranges Burnout Current RTD Excitation Current Bipolar/Unipolar Inputs REFERENCE INPUT/OUTPUT VBIAS Input USING THE AD7711 SYSTEM DESIGN CONSIDERATIONS Clocking System Synchronization Accuracy Autocalibration Self-Calibration System Calibration System Offset Calibration Background Calibration Span and Offset Limits POWER-UP AND CALIBRATION Drift Considerations POWER SUPPLIES AND GROUNDING DIGITAL INTERFACE Self-Clocking Mode Read Operation Write Operation External Clocking Mode Read Operation Write Operation SIMPLIFYING THE EXTERNAL CLOCKING MODE INTERFACE MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7711 to 8051 Interface AD7711 to 68HC11 Interface APPLICATIONS 4-Wire RTD Configurations 3-Wire RTD Configurations OUTLINE DIMENSIONS Revision History