Datasheet AD5381 (Analog Devices) - 4

Data Sheet AD5381 REVISION HISTORY 5/14—Rev. D to Rev. E 5/12—Rev. B to Rev. C
Deleted ADSP-2103 .. Throughout Changes to Features .. 1 Changed ADSP-2101 to ADSP-BF527 ... Throughout Changes to Table 3 .. 4 Deleted Table 1; Renumbered Sequential y ... 3 Changes to Table 4 .. 6 Changed ±10 µA to ±1 µA, Reference Input/Output, Input Changes to Output Voltage Settling Time and Slew Rate Current Parameter, Table 1 .. 5 Parameters, Table 5 ... 7 Changed ±10 µA to ±1 µA, Reference Input/Output, Input Changes to t14, t17, and t19 Parameters, Table 6 ... 8 Current Parameter, Table 2 .. 7 Changes to Table 9 .. 13 Changes to Table 4 .. 9 Changes to Figure 10, Figure 11, and Figure 14 ... 18 Changes to Table 6 .. 12 Changes to Figure 16 to Figure 18 and Figure 20 ... 19 Changes to Soft Reset Section ... 23 Updated Outline Dimensions and Changes to Ordering Guide .. 37 Changes to Reset Function Section .. 26 Changes to Figure 38 .. 33
8/05—Rev. A to Rev. B
Added Power Supply Sequencing Section, Table 18, Figure 39, Changes to Table 2 .. 3 and Figure 40; Renumbered Sequential y .. 34 Changes to Specifications Section .. 4 Changed ADR280 to ADR3412, Typical Configuration Circuit Changes to Absolute Maximum Ratings Section ... 13 Section .. 35 Changes to Figure 43 .. 35 Added Figure 41 and Figure 42 ... 35 Changes to Ordering Guide ... 37
9/12—Rev. C to Rev. D 6/04—Data Sheet Changed from Rev. 0 to Rev. A
Changes to Product Title .. 1 Changes to Ordering Guide ... 36 Changes to General Description Section and Table 1 .. 3 Deleted Table 2; Renumbered Sequential y ... 3
5/04—Revision 0: Initial Version
Rev. E | Page 3 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table Of Contents Revision History General Description Specifications AD5381-5 Specifications AD5381-3 Specifications AC Characteristics Timing Characteristics Serial Interface Timing I2C Serial Interface Timing Parallel Interface Timing Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write CLR Code Soft CLR Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Control Register Contents Channel Monitor Function Hardware Functions Reset Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down Interfaces DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer START and STOP Conditions Repeated START Conditions Acknowledge Bit (ACK) AD5381 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pin A5 to Pin A0 Pin DB11 to Pin DB0 Microprocessor Interfacing Parallel Interface AD5381 to MC68HC11 AD5381 to PIC16C6x/7x AD5381 to 8051 AD5381 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit Monitor Function Toggle Mode Function Thermal Monitor Function Optical Attenuators Utilizing FIFO Outline Dimensions Ordering Guide