Datasheet TC7650 (Microchip) - 7

TC7650 3.9 Pin Compatibility FIGURE 3-6: INPUT GUARD CONNECTION
On the 8-pin mini-DIP TC7650, the external null stor-
Inverting Amplifier
age capacitors are connected to pins 1 and 8. On most R R 1 2 other operational amplifiers these are left open or are Input used for offset potentiometer or compensation capaci- tor connections. - For OP05 and OP07 operational amplifiers, the Output replacement of the offset null potentiometer between + pins 1 and 8 by two capacitors from the pins to VSS will convert the OP05/07 pin configurations for TC7650 R3* operation. For LM108 devices, the compensation capacitor is replaced by the external nulling capacitors. The LM101/748/709 pinouts are modified similarly by removing any circuit connections to Pin 5. On the
Noninverting Amplifier
TC7650, Pin 5 is the output clamp connection. R Other operational amplifiers may use this pin as an off- 2 set or compensation point. R The minor modifications needed to retrofit a TC7650 3* - into existing sockets operating at reduced power sup- ply voltages make prototyping and circuit verification Output + straightforward. R1
3.10 Input Guarding
High impedance, low leakage CMOS inputs allow the Input Should Be Low TC7650 to make measurements of high-impedance Impedence For R1 R2 Optimum Guarding
NOTE:
R sources. Stray leakage paths can increase input cur- 3 = R1 + R2 rents and decrease input resistance unless inputs are guarded. A guard is a conductive PC trace surrounding
Follower
the input terminals. The ring connects to a low imped- ance point at the same potential as the inputs. Stray leakages are absorbed by the low impedance ring. The R3* equal potential between ring and inputs prevents input - leakage currents. Typical guard connections are shown in Figure 3-6. Output + The 14-pin DIP configuration has been specifically Input designed to ease input guarding. The pins adjacent to the inputs are unused. In applications requiring low leakage currents, boards should be cleaned thoroughly and blown dry after sol- dering. Protective coatings will prevent future board contamination.
3.11 Component Selection
The two required capacitors, CA and CB, have optimum values, depending on the clock or chopping frequency. For the preset internal clock, the correct value is 0.1F. To maintain the same relationship between the chop- ping frequency and the nulling time constant, the capacitor values should be scaled in proportion to the external clock, if used. High quality film type capacitors (such as Mylar) are preferred; ceramic or other lower grade capacitors may be suitable in some applications. For fast settling on initial turn-on, low dielectric absorp- tion capacitors (such as polypropylene) should be used. With ceramic capacitors, several seconds may be required to settle to 1V.  2001-2012 Microchip Technology Inc. DS21463C-page 7