Datasheet LTC4310-1, LTC4310-2 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionHot-Swappable I2C Isolators
Pages / Page20 / 10 — applicaTions inForMaTion SDA, SCL Bus Pull-Up Resistor Value Selection. …
File Format / SizePDF / 241 Kb
Document LanguageEnglish

applicaTions inForMaTion SDA, SCL Bus Pull-Up Resistor Value Selection. Rise Time Accelerators

applicaTions inForMaTion SDA, SCL Bus Pull-Up Resistor Value Selection Rise Time Accelerators

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LTC4310-1/LTC4310-2
applicaTions inForMaTion SDA, SCL Bus Pull-Up Resistor Value Selection Rise Time Accelerators
When the SDA (or SCL) bus is rising between 0V and The LTC4310’s rise time accelerator circuitry on the SDA 0.35 • VCC, the LTC4310 controls the bus rise rate to and SCL lines turns on during rising edges to reduce the (0.35 • VCC)/900ns for the LTC4310-1 and to (0.35 • VCC)/ bus rise time. When the bus has risen above 0.45 • VCC, the 300ns for the LTC4310-2. Users must quantify their LTC4310 turns on a strong, slew-limited pull-up current, parasitic bus capacitance, CBUS, and choose a bus pull- IBOOST, to help even heavily loaded buses meet the rise time up resistor, RBUS, based on their bus pull-up supply specifications. See the Typical Performance Characteristics voltage and maximum bus switching frequency to en- section for the rise time accelerator pull-up current as a sure that each bus rises faster than the controlled rise function of temperature and bus capacitance. When either rate. For bus frequencies up to 100kHz, choose the the bus has risen above (V LTC4310-1 and refer to Figure 2 for the maximum pull-up CC – 1V) or 300ns after the pull-up current has turned on (whichever comes first), the resistance to use. For bus frequencies between 100kHz LTC4310 deactivates its pull-up current to deter fighting and 400kHz, choose the LTC4310-2 and refer to Figure 3 for the maximum pull-up resistance to use. Be sure to with the subsequent falling edge. Users must ensure that the include worst-case resistor tolerance when selecting bus pull-up supply voltage VBUS ≥ VCC, so that the accelera- resistor value. tors do not overdrive the SDA, SCL bus and source current into VBUS. The rise time accelerators are deactivated during start-up, thermal shutdown, shutdown and after disconnec- tion due to a stuck bus or failure to receive a transmission within 4.6ms. 18 18 16 16 14 14 VCC = 5V 12 12 V (kΩ) V CC = 5V CC = 3.3V 10 (kΩ) 10 VCC = 3.3V 8 8 R BUS(MAX) 6 R BUS(MAX) 6 4 4 2 2 0 0 1 10 100 1000 1 10 100 1000 CBUS(MAX) (pF) CBUS(MAX) (pF) 431012 F02 431012 F03
Figure 2. Maximum SDA,SCL Bus Pull-Up Resistor Value as a Figure 3. Maximum SDA,SCL Bus Pull-Up Resistor Value as Function of Parasitic Bus Capacitance for the LTC4310-1 a Function of Parasitic Bus Capacitance for the LTC4310-2
431012fa 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts