Datasheet LTC4300A-3 (Analog Devices) - 6

ManufacturerAnalog Devices
DescriptionLevel Shifting Hot Swappable 2-Wire Bus Buffer with Enable
Pages / Page14 / 6 — block DiagraM. 2-Wire Bus Buffer and Hot Swap. Controller
File Format / SizePDF / 216 Kb
Document LanguageEnglish

block DiagraM. 2-Wire Bus Buffer and Hot Swap. Controller

block DiagraM 2-Wire Bus Buffer and Hot Swap Controller

Model Line for this Datasheet

Text Version of Document

LTC4300A-3
block DiagraM 2-Wire Bus Buffer and Hot Swap

Controller
VCC 8 2mA 2mA SLEW RATE SLEW RATE 1 VCC2 DETECTOR DETECTOR BACKPLANE-TO-CARD SDAIN 6 4 CONNECTION 7 SDAOUT CONNECT CONNECT CONNECT 100k 100k 1V PRECHARGE 100k 100k 2mA 2mA SLEW RATE SLEW RATE DETECTOR DETECTOR BACKPLANE-TO-CARD SCLIN 3 CONNECTION 2 SCLOUT CONNECT CONNECT + – VCC2 – 1V + + – – STOP BIT AND BUS IDLE + 0.5A 0.55VCC/ – 20pF 0.45VCC 95µs CONNECT CONNECT UVLO DELAY, ENABLE RD 5 RISING QB ONLY S 4 GND 0.5pF 4300a3 BD 4300a3fa 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Related Parts Typical Application