Datasheet LTC4312 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Pin-Selectable, 2-Channel, 2-Wire Multiplexer with Bus Buffers |
| Pages / Page | 20 / 9 — APPLICATIONS INFORMATION. Table 1. ACC Control of the Rise Time … |
| File Format / Size | PDF / 200 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Table 1. ACC Control of the Rise Time Accelerator Current IRTA
Model Line for this Datasheet
Text Version of Document
LTC4312
APPLICATIONS INFORMATION
The LTC4312 is a 1:2 pin selectable I2C multiplexer that
Table 1. ACC Control of the Rise Time Accelerator Current IRTA
provides a high noise margin, capacitance buffering and
and Buffer Turn-Off Voltage VIL,RISING
level translation capability on its clock and data pins. Rise
ACC IRTA VRTA(TH) VIL,RISING
time accelerators accelerate rising edges to enable opera- Low Strong 0.8V 0.6V tion at high frequencies with heavy loads. These features Open 3mA 0.4•VMIN 0.33•VMIN are illustrated in the following subsections. High None N/A 0.33•VMIN
Rise Time Accelerators and DC Hold-Off Voltage
The ACC pin has a resistive divider between VCC and GND Once the LTC4312 has exited UVLO and a connection has to set its voltage to 0.5•VCC if left open. In the current been established between the SDA and SCL inputs and source accelerator mode, the LTC4312 provides a 3mA outputs, the rise time accelerators on both the input and constant current source pull-up. In the strong mode, the output sides of the SDA and SCL busses are activated LTC4312 sources pull-up current to make the bus rise at based on the state of the ACC pin and the V 75V/μs (typical). The strong mode current is therefore CC2 supply voltage. During positive bus transitions of at least 0.2V/ directly proportional to the bus capacitance. The LTC4312 μs, the rise time accelerators provide pull-up currents to is capable of sourcing up to 45mA of current in the strong reduce rise time. Enabling the rise time accelerators al- mode. The effect of the rise time accelerator strength is lows users to choose larger bus pull-up resistors, reduc- shown in the SDA waveforms in Figures 1 and 2 for iden- ing power consumption and improving logic low noise tical bus loads for a single enabled output channel. The margins, to design with bus capacitances outside of the rise time accelerator supplies 3mA and 10mA of pull-up I2C specifi cation or to switch at a higher clock frequency. current (IRTA) respectively in the current source and strong The ACC pin sets the turn-off threshold voltage for the modes for the bus conditions shown in Figures 1 and 2. buffers, the turn-on voltage for the rise time accelerators, The rise time accelerator turn-on voltage in the strong and the rise time accelerator pull-up current strength. The mode is also lower as compared to the current source ACC functionality is shown in Table 1. Set ACC open or mode. For identical bus loading conditions, the bus returns high when a high noise margin is required such as when high faster in Figure 1 compared to Figure 2 because of the LTC4312 is used in a system having I2C devices with both the higher IRTA and the lower turn-on voltage of the V rise time accelerator. In each fi gure, note that the input OL > 0.4V. and output rising waveforms are nearly coincident due to the input and output busses having nearly identical bus current and capacitance. CIN = COUT = 200pF CIN = COUT = 200pF RBUS = 10kΩ RBUS = 10kΩ ACC = 0 ACC = OPEN VCC = VCC = 5V VCC = VCC2 = 5V SDAOUT1 SDAOUT1 /DIV 0V /DIV 0V 2V 2V SDAIN SDAIN 0V 0V 500ns/DIV 4312 F01 500ns/DIV 4312 F02
Figure 1. Bus Rising Edge for the Figure 2. Bus Rising Edge for the Strong Accelerator Mode Current Source Accelerator Mode
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APPLICATIONS INFORMATION
The LTC4312 is a 1:2 pin selectable I2C multiplexer that
Table 1. ACC Control of the Rise Time Accelerator Current IRTA
provides a high noise margin, capacitance buffering and
and Buffer Turn-Off Voltage VIL,RISING
level translation capability on its clock and data pins. Rise
ACC IRTA VRTA(TH) VIL,RISING
time accelerators accelerate rising edges to enable opera- Low Strong 0.8V 0.6V tion at high frequencies with heavy loads. These features Open 3mA 0.4•VMIN 0.33•VMIN are illustrated in the following subsections. High None N/A 0.33•VMIN
Rise Time Accelerators and DC Hold-Off Voltage
The ACC pin has a resistive divider between VCC and GND Once the LTC4312 has exited UVLO and a connection has to set its voltage to 0.5•VCC if left open. In the current been established between the SDA and SCL inputs and source accelerator mode, the LTC4312 provides a 3mA outputs, the rise time accelerators on both the input and constant current source pull-up. In the strong mode, the output sides of the SDA and SCL busses are activated LTC4312 sources pull-up current to make the bus rise at based on the state of the ACC pin and the V 75V/μs (typical). The strong mode current is therefore CC2 supply voltage. During positive bus transitions of at least 0.2V/ directly proportional to the bus capacitance. The LTC4312 μs, the rise time accelerators provide pull-up currents to is capable of sourcing up to 45mA of current in the strong reduce rise time. Enabling the rise time accelerators al- mode. The effect of the rise time accelerator strength is lows users to choose larger bus pull-up resistors, reduc- shown in the SDA waveforms in Figures 1 and 2 for iden- ing power consumption and improving logic low noise tical bus loads for a single enabled output channel. The margins, to design with bus capacitances outside of the rise time accelerator supplies 3mA and 10mA of pull-up I2C specifi cation or to switch at a higher clock frequency. current (IRTA) respectively in the current source and strong The ACC pin sets the turn-off threshold voltage for the modes for the bus conditions shown in Figures 1 and 2. buffers, the turn-on voltage for the rise time accelerators, The rise time accelerator turn-on voltage in the strong and the rise time accelerator pull-up current strength. The mode is also lower as compared to the current source ACC functionality is shown in Table 1. Set ACC open or mode. For identical bus loading conditions, the bus returns high when a high noise margin is required such as when high faster in Figure 1 compared to Figure 2 because of the LTC4312 is used in a system having I2C devices with both the higher IRTA and the lower turn-on voltage of the V rise time accelerator. In each fi gure, note that the input OL > 0.4V. and output rising waveforms are nearly coincident due to the input and output busses having nearly identical bus current and capacitance. CIN = COUT = 200pF CIN = COUT = 200pF RBUS = 10kΩ RBUS = 10kΩ ACC = 0 ACC = OPEN VCC = VCC = 5V VCC = VCC2 = 5V SDAOUT1 SDAOUT1 /DIV 0V /DIV 0V 2V 2V SDAIN SDAIN 0V 0V 500ns/DIV 4312 F01 500ns/DIV 4312 F02
Figure 1. Bus Rising Edge for the Figure 2. Bus Rising Edge for the Strong Accelerator Mode Current Source Accelerator Mode
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