Datasheet ADXL313 (Analog Devices) - 6

Data Sheet ADXL313 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LK C /O L/S DD I C NC V NC NC NC NC S NC 32 31 30 29 28 27 26 25 GND 1 24 SDA/SDI/SDIO RESERVED 2 23 SDO/ALT ADDRESS GND 3 22 RESERVED ADXL313 GND 4 21 INT2 TOP VIEW V 5 20 INT1 S (Not to Scale) CS 6 19 NC RESERVED 7 18 NC NC 8 17 NC 9 1 10 1 12 13 14 15 16 NC NC NC NC NC NC NC NC NOTES
002
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD MUST BE SOLDERED TO THE GROUND PLANE.
1469- 1 Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 GND This pin must be connected to ground. 2 RESERVED Reserved. This pin must be connected to VS or left open. 3 GND This pin must be connected to ground. 4 GND This pin must be connected to ground. 5 VS Supply Voltage. 6 CS Chip Select. 7 RESERVED Reserved. This pin must be left open. 8 to 19 NC No Connect. Do not connect to this pin. 20 INT1 Interrupt 1 Output. 21 INT2 Interrupt 2 Output. 22 RESERVED Reserved. This pin must be connected to GND or left open. 23 SDO/ALT ADDRESS Serial Data Output/Alternate I2C Address Select. 24 SDA/SDI/SDIO Serial Data (I2C)/Serial Data Input (SPI 4-Wire)/Serial Data Input/Output (SPI 3-Wire). 25 NC No Connect. Do not connect to this pin. 26 SCL/SCLK I2C Serial Communications Clock/SPI Serial Communications Clock. 27 to 30 NC No Connect. Do not connect to this pin. 31 VDD I/O Digital Interface Supply Voltage. 32 NC No Connect. Do not connect to this pin. EP Exposed Pad. The exposed pad must be soldered to the ground plane. Rev. B | Page 5 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING POWER SAVINGS Power Modes Autosleep Mode Standby Mode SERIAL COMMUNICATIONS SPI I2C INTERRUPTS DATA_READY Activity Inactivity Watermark Overrun FIFO Bypass Mode FIFO Mode Stream Mode Trigger Mode Retrieving Data from FIFO SELF TEST REGISTER MAP REGISTER DEFINITIONS Register 0x00—DEVID_0 (Read Only) Register 0x01—DEVID_1 (Read Only) Register 0x02—PARTID (Read Only) Register 0x03—REVID (Read Only) Register 0x04—XID (Read Only) Register 0x18—SOFT_RESET (Read/Write) Register 0x1E—OFSX (Read/Write), Register 0x1F—OFSY (Read/Write),Register 0x20—OFSZ (Read/Write) Register 0x24—THRESH_ACT (Read/Write) Register 0x25—THRESH_INACT (Read/Write) Register 0x26—TIME_INACT (Read/Write) Register 0x27—ACT_INACT_CTL (Read/Write) ACT_AC/DC and INACT_AC/DC Bits ACT_x and INACT_x Bits Register 0x2C—BW_RATE (Read/Write) LOW_POWER Bit Rate Bits Register 0x2D—POWER_CTL (Read/Write) I2C_Disable Bit Link Bit AUTO_SLEEP Bit Measure Bit Sleep Bit Wake-Up Bits Register 0x2E—INT_ENABLE (Read/Write) Register 0x2F—INT_MAP (Read/Write) Register 0x30—INT_SOURCE (Read Only) Register 0x31—DATA_FORMAT (Read/Write) SELF_TEST Bit SPI Bit INT_INVERT Bit FULL_RES Bit Justify Bit Range Bits Register 0x32 and Register 0x33—DATA_X0, DATA_X1 (Read Only), Register 0x34 and Register 0x35—DATA_Y0, DATA_Y1 (Read Only), Register 0x36 and Register 0x37—DATA_Z0, DATA_Z1 (Read Only) Register 0x38—FIFO_CTL (Read/Write) FIFO_MODE Bits Trigger Bit Samples Bits 0x39—FIFO_STATUS (Read Only) FIFO_TRIG Bit Entries Bits APPLICATIONS INFORMATION POWER SUPPLY DECOUPLING MECHANICAL CONSIDERATIONS FOR MOUNTING THRESHOLD LINK MODE SLEEP MODE vs. LOW POWER MODE USING SELF TEST 3200 Hz AND 1600 Hz ODR DATA FORMATTING AXES OF ACCELERATION SENSITIVITY SOLDER PROFILE OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS