Datasheet ADIS16240 (Analog Devices) - 9

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ADIS16240 Data Sheet THEORY OF OPERATION
The ADIS16240 is a triple-axis accelerometer system for shock
USER INTERFACE
detection and recording applications. This sensing system collects
SPI Interface
data autonomously and makes it available to any processor system that supports a 4-wire serial peripheral interface (SPI). Data col ection and configuration commands both use the SPI, which consists of four wires. The chip select (CS) signal activates
SENSING ELEMENT
the SPI interface, and the serial clock (SCLK) synchronizes the Digital shock sensing starts with the triple-axis MEMS sensing serial data lines. The serial input data clocks into DIN on the rising element in the ADIS16240. This element provides a linear motion- edge of SCLK, and the serial output data clocks out of DOUT on to-electrical transducer function. Figure 11 provides a basic the fal ing edge of SCLK. Many digital processor platforms physical diagram of the sensing element and its response to support this interface with dedicated serial ports and simple linear acceleration. It uses a fixed frame and a moving frame to instruction sets. form a differential capacitance network that responds to linear
User Registers
acceleration. Tiny springs tether the moving frame to the fixed frame and govern the relationship between acceleration and The user registers provide addressing for all input/output physical displacement. A modulation signal on the moving plate operations on the SPI interface. Each 16-bit register has its own feeds through each capacitive path into the fixed frame plates unique bit assignment and has two 7-bit addresses: one for its and into a demodulation circuit, which produces the electrical upper byte and one for its lower byte. Table 7 provides a memory signal that is proportional to the acceleration acting on the device. map for each register and identifies output registers as read only (R) and configuration registers as either read/write (R/W) or write
ANCHOR
only (W). The control registers use a dual-memory structure. The SRAM controls operation while the part is on and facilitates al user
PLATE MOVABLE CAPACITORS FRAME
configuration inputs. The flash memory provides nonvolatile stor-
N
age for the control registers that are identified with a “yes” in the
IO FIXED
flash backup column in Table 7. Storing configuration data in the
PLATES RAT E
flash memory requires a manual command (see GLOB_CMD[3]
L UNIT SENSING CELL
in Table 24). When the device starts up from an initial power-up
UNIT ACCE
or reset, the flash memory contents load into the SRAM. Then
MOVING FORCING PLATE CELL
the device starts producing data according to the configuration in the control registers. 007
MANUAL ANCHOR FLASH
08133-
BACKUP
Figure 11. MEMS Sensor Diagram
NONVOLATILE VOLATILE DATA SAMPLING AND PROCESSING FLASH MEMORY SRAM (NO SPI ACCESS) (SPI ACCESS)
The analog acceleration signals feed into an analog-to-digital converter stage that passes digitized data into the control er for
START-UP RESET
009 data processing and capture. The ADIS16240 runs autonomously, 08133- based on the configuration in the user control registers. Figure 13. Control Registers—SRAM and Flash Memory Diagram
CAPTURE CAPTURE BUFFER OUTPUT
The ADIS16240 offers a recorder function that captures
REGISTERS LS A
acceleration information based on either internal or external
MEMS T R IGN SENSOR
triggers. The buffer memory is 3 × 8192 samples and is capable
I S PO P
of storing multiple trigger events.
CONTROLLER S CONTROL SPI REGISTERS CLOCK INPUT/OUTPUT
008
FUNCTIONS
08133- Figure 12. Simplified Sensor Signal Processing Diagram Rev. C | Page 8 of 20 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Sensing Element Data Sampling and Processing User Interface SPI Interface User Registers Capture Basic Operation SPI Write Commands Memory Map Output Data Registers Processing Sensor Data Event Recorder Internal Trigger Setup External Trigger Setup Buffer Memory Configuration Event Organization Reading Event Data Transient Behavior During Capture Operational Control Internal Sample Rate Global Commands Input/Output Lines Offset Adjustment Diagnostics Clock Checksum Flash Memory Endurance Management Applications Information Assembly Interface Printed Circuit Board (PCB) Outline Dimensions Ordering Guide