Datasheet ADIS16203 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Programmable 360° Inclinometer |
| Pages / Page | 29 / 10 — ADIS16203. B) S. L ( Y T. ARI. N A U. INE. 4096. 8192. 12288. 16384. ADC … |
| Revision | C |
| File Format / Size | PDF / 459 Kb |
| Document Language | English |
ADIS16203. B) S. L ( Y T. ARI. N A U. INE. 4096. 8192. 12288. 16384. ADC CODES. (mV). 3.0V/–40°C 3.0V/+25°C. 3.0V/+125°C. 3.3V /–40°C
Model Line for this Datasheet
Text Version of Document
ADIS16203 3 45 40 2 35 B) S 1 30 L ( Y T TY 25 TI ARI 0 N A U 20 INE Q NL –1 15 NO 10 –2 5 –3 0 1 4096 8192 12288 16384
11 0
.7 .4 .1 .8 .5 .2 .9 .6 .3 0 3 6 9 2 5 8 1 4 7 0 3 6 9 2 5
8-
0. 0. 0. 1. 1. 1. 2. 2. 2. 3. 3. 3. 3. 4. 4.
14
–2 –2 –2 –1 –1 –1 –0 –0 –0
0
ADC CODES
10 8- 06
(mV)
10 06 Figure 11. Typical ADC Integral Nonlinearity at 25°C/3.3 V Figure 14. DAC Offset Distribution at 25°C/3.3 V
3 5 3.0V/–40°C 3.0V/+25°C 4 3.0V/+125°C 2 3.3V /–40°C 3 3.3V/+25°C 3.3V/+125°C 3.6V/–40°C B) B) 2 S 1 S 3.6V/+25°C L L 3.6V/+125°C ( ( 1 Y Y T T 0 ARI 0 ARI INE INE –1 NL NL –1 NO NO –2 –3 –2 –4 –3 –5
15
1 4096 8192 12288 16384
12 0
0 512 1024 1536 2048 2560 3072 3584 4096
0 8- 8- 10
ADC CODES
10
DAC CODES
06 06 Figure 12. Typical ADC Differential Nonlinearity Figure 15. Typical DAC Integral Nonlinearity
120 250 100 200 80 150 Y Y IT IT 60 UANT UANT Q Q 100 40 50 20 0 0 6 9 2 5 8 1 4 7 0 3 6 9 2 5 8 1 4 7 0 3 6 9 2 5 8
13
4975 4977 4979 4981 4983 4985 4987 4989 4991 4993 4995 4997 4999 5001 5003 5005 5007 5009 5011 5013 5015 5017 5019 5021 5023 606. 606. 607. 607. 607. 608. 608. 608. 609. 609. 609. 609. 610. 610. 610. 611. 611. 611. 612. 612. 612. 612. 613. 613. 613.
16 0
2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2.
0 8- 8-
(µV/LSB)
10 610 0
(V)
06 Figure 13. DAC Gain Distribution at 25°C/3.3 V Figure 16. VREF Distribution at 25°C/3.3 V Rev. A | Page 9 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMACE CHARACTERISTICS THEORY OF OPERATION OUTPUT RESPONSE TEMPERATURE SENSOR BASIC OPERATION SERIAL PERIPHERAL INTERFACE (SPI) DATA OUTPUT REGISTER ACCESS PROGRAMMING AND CONTROL CONTROL REGISTER OVERVIEW CONTROL REGISTER ACCESS CONTROL REGISTER DETAILS CALIBRATION CALIBRATION REGISTER DEFINITION INCL_NULL Register Definition ALARMS ALM_MAG1 Register Definition ALM_SMPL1 Register Definition ALM_MAG2 Register Definition ALM_SMPL2 Register Definition ALM_CTRL Register Definition SAMPLE PERIOD CONTROL SMPL_TIME Register Definition FILTERING CONTROL AVG_CNT Register Definition POWER-DOWN CONTROL SLP_CNT Register Definition STATUS FEEDBACK STATUS Register Definition COMMAND CONTROL COMMAND Register Definition MISCELLANEOUS CONTROL REGISTER MSC_CTRL Register Definition PERIPHERALS AUXILIARY ADC FUNCTION AUXILIARY DAC FUNCTION AUX_DAC Register Definition GENERAL-PURPOSE I/O CONTROL GPIO_CTRL Register Definition APPLICATIONS HARDWARE CONSIDERATIONS GROUNDING AND BOARD LAYOUT RECOMMENDATIONS SELF-TEST TIPS BAND GAP REFERENCE POWER-ON RESET OPERATION SECOND-LEVEL ASSEMBLY EXAMPLE PAD LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
11 0
.7 .4 .1 .8 .5 .2 .9 .6 .3 0 3 6 9 2 5 8 1 4 7 0 3 6 9 2 5
8-
0. 0. 0. 1. 1. 1. 2. 2. 2. 3. 3. 3. 3. 4. 4.
14
–2 –2 –2 –1 –1 –1 –0 –0 –0
0
ADC CODES
10 8- 06
(mV)
10 06 Figure 11. Typical ADC Integral Nonlinearity at 25°C/3.3 V Figure 14. DAC Offset Distribution at 25°C/3.3 V
3 5 3.0V/–40°C 3.0V/+25°C 4 3.0V/+125°C 2 3.3V /–40°C 3 3.3V/+25°C 3.3V/+125°C 3.6V/–40°C B) B) 2 S 1 S 3.6V/+25°C L L 3.6V/+125°C ( ( 1 Y Y T T 0 ARI 0 ARI INE INE –1 NL NL –1 NO NO –2 –3 –2 –4 –3 –5
15
1 4096 8192 12288 16384
12 0
0 512 1024 1536 2048 2560 3072 3584 4096
0 8- 8- 10
ADC CODES
10
DAC CODES
06 06 Figure 12. Typical ADC Differential Nonlinearity Figure 15. Typical DAC Integral Nonlinearity
120 250 100 200 80 150 Y Y IT IT 60 UANT UANT Q Q 100 40 50 20 0 0 6 9 2 5 8 1 4 7 0 3 6 9 2 5 8 1 4 7 0 3 6 9 2 5 8
13
4975 4977 4979 4981 4983 4985 4987 4989 4991 4993 4995 4997 4999 5001 5003 5005 5007 5009 5011 5013 5015 5017 5019 5021 5023 606. 606. 607. 607. 607. 608. 608. 608. 609. 609. 609. 609. 610. 610. 610. 611. 611. 611. 612. 612. 612. 612. 613. 613. 613.
16 0
2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2. 2.
0 8- 8-
(µV/LSB)
10 610 0
(V)
06 Figure 13. DAC Gain Distribution at 25°C/3.3 V Figure 16. VREF Distribution at 25°C/3.3 V Rev. A | Page 9 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMACE CHARACTERISTICS THEORY OF OPERATION OUTPUT RESPONSE TEMPERATURE SENSOR BASIC OPERATION SERIAL PERIPHERAL INTERFACE (SPI) DATA OUTPUT REGISTER ACCESS PROGRAMMING AND CONTROL CONTROL REGISTER OVERVIEW CONTROL REGISTER ACCESS CONTROL REGISTER DETAILS CALIBRATION CALIBRATION REGISTER DEFINITION INCL_NULL Register Definition ALARMS ALM_MAG1 Register Definition ALM_SMPL1 Register Definition ALM_MAG2 Register Definition ALM_SMPL2 Register Definition ALM_CTRL Register Definition SAMPLE PERIOD CONTROL SMPL_TIME Register Definition FILTERING CONTROL AVG_CNT Register Definition POWER-DOWN CONTROL SLP_CNT Register Definition STATUS FEEDBACK STATUS Register Definition COMMAND CONTROL COMMAND Register Definition MISCELLANEOUS CONTROL REGISTER MSC_CTRL Register Definition PERIPHERALS AUXILIARY ADC FUNCTION AUXILIARY DAC FUNCTION AUX_DAC Register Definition GENERAL-PURPOSE I/O CONTROL GPIO_CTRL Register Definition APPLICATIONS HARDWARE CONSIDERATIONS GROUNDING AND BOARD LAYOUT RECOMMENDATIONS SELF-TEST TIPS BAND GAP REFERENCE POWER-ON RESET OPERATION SECOND-LEVEL ASSEMBLY EXAMPLE PAD LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
