Datasheet LT3710 (Analog Devices) - 6
Manufacturer | Analog Devices |
Description | Secondary Side Synchronous Post Regulator |
Pages / Page | 12 / 6 — BLOCK DIAGRA |
File Format / Size | PDF / 228 Kb |
Document Language | English |
BLOCK DIAGRA
Model Line for this Datasheet
Text Version of Document
LT3710
W BLOCK DIAGRA
µF OUT2V OUTC 100 I O C4 2nF 3710 BD R3 R4 S1R L1 I L C6 100pF M1 M2 R6 5k µF C2 0.3 C1 500pF R5 2k D3 + – OUT FB BOOST TGATE SW GBIAS C3 µF2 BGATE PGND BGS CL CL ILCOMP VA V 1 2 3 16 15 14 9 11 12 6 10 8 8V + REF R1 R2 V 0.8V 7V C7 5nF + D6 D7 D4 SS 7 µA + – – + A8 I 2 200 2V VA A4 A5 I 1 µA + 10 5V CA2 + – A6 8mV 70mV + A3 A10 A11 – + – + – + + – CA1 + + + SS SW + BGATE 2.5V 3.5V 1.6V PWM – D5 OSC SHUTDOWN RS ONE A2 E2 RESET SHOT – + 8V A1 + A7 13 CCV Q1 NOTE: EXPOSED PAD (PIN 17) IS SGND AND MUST BE CONNECTED TO PGND (PIN 14). D2 E4 17 – + R8 2.5V µF + SGND C8 2 5 4 D1 R7 S SYNC C 10pF CSET C5 500pF SV SR 10k 3710f 6