Datasheet ATmega165, ATmega165V - Preliminary Summary (Atmel) - 2
| Manufacturer | Atmel |
| Pages / Page | 19 / 2 — ATmega165/V. Pin Configurations. Figure 1. Disclaimer |
| File Format / Size | PDF / 340 Kb |
| Document Language | English |
ATmega165/V. Pin Configurations. Figure 1. Disclaimer
Model Line for this Datasheet
Text Version of Document
ATmega165/V Pin Configurations Figure 1.
Pinout ATmega165 AVCC GND AREF PF0 (ADC0) PF1 (ADC1) PF2 (ADC2) PF3 (ADC3) PF4 (ADC4/TCK) PF5 (ADC5/TMS) PF6 (ADC6/TDO) PF7 (ADC7/TDI) GND VCC PA0 PA1 PA2 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DNC 1 48 PA3 (RXD/PCINT0) PE0 2 47 PA4 INDEX CORNER (TXD/PCINT1) PE1 3 46 PA5 (XCK/AIN0/PCINT2) PE2 PA6 4 45 (AIN1/PCINT3) PE3 5 44 PA7 (USCK/SCL/PCINT4) PE4 6 43 PG2 (DI/SDA/PCINT5) PE5 7 42 PC7 (DO/PCINT6) PE6 8 41 PC6 ATmega165 (CLKO/PCINT7) PE7 9 40 PC5 (SS/PCINT8) PB0 10 39 PC4 (SCK/PCINT9) PB1 11 38 PC3 (MOSI/PCINT10) PB2 12 PC2 37 (MISO/PCINT11) PB3 13 36 PC1 (OC0A/PCINT12) PB4 14 PC0 35 (OC1A/PCINT13) PB5 15 34 PG1 (OC1B/PCINT14) PB6 16 33 PG0 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 VCC PD5 PD7 GND PD2 PD3 PD4 PD6 RESET (T1) PG3 (T0) PG4 (ICP1) PD0 (INT0) PD1 (TOSC2) XTAL2 (TOSC1) XTAL1 (OC2A/PCINT15) PB7 Note: The large center pad underneath the QFN/MLF packages is made of metal and internally connected to GND. It should be soldered or glued to the board to ensure good mechani- cal stability. If the center pad is left unconnected, the package might loosen from the board.
Disclaimer
Typical values contained in this datasheet are based on simulations and characteriza- tion of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is characterized.
2
2573GS–AVR–07/09 Document Outline Features Pin Configurations Disclaimer Overview Block Diagram Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) Port E (PE7..PE0) Port F (PF7..PF0) Port G (PG4..PG0) RESET XTAL1 XTAL2 AVCC AREF Register Summary Instruction Set Summary Ordering Information Packaging Information 64A 64M1 Errata ATmega165 Rev A Datasheet Revision History Changes from Rev. 2573F-08/06 to Rev. 2573G-07/09 Changes from Rev. 2573E-07/06 to Rev. 2573F-08/06 Changes from Rev. 2573D-03/06 to Rev. 2573E-07/06 Changes from Rev. 2573C-03/06 to Rev. 2573D-03/06 Changes from Rev. 2573B-03/05 to Rev. 2573C-02/06 Changes from Rev. 2573A-06/04 to Rev. 2573B-03/05
Pinout ATmega165 AVCC GND AREF PF0 (ADC0) PF1 (ADC1) PF2 (ADC2) PF3 (ADC3) PF4 (ADC4/TCK) PF5 (ADC5/TMS) PF6 (ADC6/TDO) PF7 (ADC7/TDI) GND VCC PA0 PA1 PA2 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DNC 1 48 PA3 (RXD/PCINT0) PE0 2 47 PA4 INDEX CORNER (TXD/PCINT1) PE1 3 46 PA5 (XCK/AIN0/PCINT2) PE2 PA6 4 45 (AIN1/PCINT3) PE3 5 44 PA7 (USCK/SCL/PCINT4) PE4 6 43 PG2 (DI/SDA/PCINT5) PE5 7 42 PC7 (DO/PCINT6) PE6 8 41 PC6 ATmega165 (CLKO/PCINT7) PE7 9 40 PC5 (SS/PCINT8) PB0 10 39 PC4 (SCK/PCINT9) PB1 11 38 PC3 (MOSI/PCINT10) PB2 12 PC2 37 (MISO/PCINT11) PB3 13 36 PC1 (OC0A/PCINT12) PB4 14 PC0 35 (OC1A/PCINT13) PB5 15 34 PG1 (OC1B/PCINT14) PB6 16 33 PG0 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 VCC PD5 PD7 GND PD2 PD3 PD4 PD6 RESET (T1) PG3 (T0) PG4 (ICP1) PD0 (INT0) PD1 (TOSC2) XTAL2 (TOSC1) XTAL1 (OC2A/PCINT15) PB7 Note: The large center pad underneath the QFN/MLF packages is made of metal and internally connected to GND. It should be soldered or glued to the board to ensure good mechani- cal stability. If the center pad is left unconnected, the package might loosen from the board.
Disclaimer
Typical values contained in this datasheet are based on simulations and characteriza- tion of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is characterized.
2
2573GS–AVR–07/09 Document Outline Features Pin Configurations Disclaimer Overview Block Diagram Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) Port E (PE7..PE0) Port F (PF7..PF0) Port G (PG4..PG0) RESET XTAL1 XTAL2 AVCC AREF Register Summary Instruction Set Summary Ordering Information Packaging Information 64A 64M1 Errata ATmega165 Rev A Datasheet Revision History Changes from Rev. 2573F-08/06 to Rev. 2573G-07/09 Changes from Rev. 2573E-07/06 to Rev. 2573F-08/06 Changes from Rev. 2573D-03/06 to Rev. 2573E-07/06 Changes from Rev. 2573C-03/06 to Rev. 2573D-03/06 Changes from Rev. 2573B-03/05 to Rev. 2573C-02/06 Changes from Rev. 2573A-06/04 to Rev. 2573B-03/05
