Datasheet LTC6090, LTC6090-5 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 140V CMOS Rail-to-Rail Output, Picoamp Input Current Op Amp |
| Pages / Page | 26 / 10 — PIN FUNCTIONS (S8E/FE). COM (Pin 1/Pin 1):. OUT (Pin 6/Pin 12):. –IN (Pin … |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
PIN FUNCTIONS (S8E/FE). COM (Pin 1/Pin 1):. OUT (Pin 6/Pin 12):. –IN (Pin 2/Pin 4):. V+ (Pin 7/Pin 14):. +IN (Pin 3/Pin 5):
Model Line for this Datasheet
- LTC6090CFE#PBF LTC6090CFE#TRPBF LTC6090CFE-5#PBF LTC6090CFE-5#TRPBF LTC6090CS8E#PBF LTC6090CS8E#TRPBF LTC6090CS8E-5#PBF LTC6090CS8E-5#TRPBF LTC6090HFE#PBF LTC6090HFE#TRPBF LTC6090HFE-5#PBF LTC6090HFE-5#TRPBF LTC6090HS8E#PBF LTC6090HS8E#TRPBF LTC6090HS8E-5#PBF LTC6090HS8E-5#TRPBF LTC6090IFE#PBF LTC6090IFE#TRPBF LTC6090IFE-5#PBF LTC6090IFE-5#TRPBF LTC6090IS8E#PBF LTC6090IS8E#TRPBF LTC6090IS8E-5#PBF LTC6090IS8E-5#TRPBF
Text Version of Document
LTC6090/LTC6090-5
PIN FUNCTIONS (S8E/FE) COM (Pin 1/Pin 1):
COM Pin is used to interface OD and
OUT (Pin 6/Pin 12):
Output Pin. If this rail-to-rail output TFLAG pins to voltage control circuits. Tie this pin to the goes below V– , the ESD protection diode will forward low voltage ground, or let it float. bias. If OUT goes above V+, then output device diodes
–IN (Pin 2/Pin 4):
Inverting Input Pin. Input common will forward bias. Avoid forward biasing the diodes on the mode range is V– + 3V to V+ – 3V. Do not exceed absolute OUT pin. Excessive current can cause damage. maximum voltage range.
V+ (Pin 7/Pin 14):
Positive Supply Pin.
+IN (Pin 3/Pin 5):
Noninverting Input Pin. Input common
OD (Pin 8/Pin 16):
Output Disable Pin. Active low input mode range is V– + 3V to V+ – 3V. Do not exceed absolute disables the output stage. If left open, an internal pull-up maximum voltage range. resistor enables the amplifier. Input voltage levels are
V– (Pin 4, Exposed Pad Pin 9/Pin 8, Exposed Pad
referred to the COM pin.
Pin 17):
Negative Supply Pin. Connect to V– Only. To
GUARD (NA/Pins 2, 3, 6, 7, 10, 11, 13, 15):
Guard pins achieve low thermal resistance connect this pin to the increase clearance and creepage between other pins. V– power plane. The V– power plane connection removes Pins 3 and 6 can be used to build guard rings around the heat from the device and should be electrically isolated inputs. from all other power planes.
TFLAG (Pins 5, 9/Pins 9, 17):
Temperature Flag Pin. The TFLAG pin is an open drain output that sinks current when the die temperature exceeds 145°C. 6090fe 10 For more information www.linear.com/LTC6090 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS (S8E/FE) COM (Pin 1/Pin 1):
COM Pin is used to interface OD and
OUT (Pin 6/Pin 12):
Output Pin. If this rail-to-rail output TFLAG pins to voltage control circuits. Tie this pin to the goes below V– , the ESD protection diode will forward low voltage ground, or let it float. bias. If OUT goes above V+, then output device diodes
–IN (Pin 2/Pin 4):
Inverting Input Pin. Input common will forward bias. Avoid forward biasing the diodes on the mode range is V– + 3V to V+ – 3V. Do not exceed absolute OUT pin. Excessive current can cause damage. maximum voltage range.
V+ (Pin 7/Pin 14):
Positive Supply Pin.
+IN (Pin 3/Pin 5):
Noninverting Input Pin. Input common
OD (Pin 8/Pin 16):
Output Disable Pin. Active low input mode range is V– + 3V to V+ – 3V. Do not exceed absolute disables the output stage. If left open, an internal pull-up maximum voltage range. resistor enables the amplifier. Input voltage levels are
V– (Pin 4, Exposed Pad Pin 9/Pin 8, Exposed Pad
referred to the COM pin.
Pin 17):
Negative Supply Pin. Connect to V– Only. To
GUARD (NA/Pins 2, 3, 6, 7, 10, 11, 13, 15):
Guard pins achieve low thermal resistance connect this pin to the increase clearance and creepage between other pins. V– power plane. The V– power plane connection removes Pins 3 and 6 can be used to build guard rings around the heat from the device and should be electrically isolated inputs. from all other power planes.
TFLAG (Pins 5, 9/Pins 9, 17):
Temperature Flag Pin. The TFLAG pin is an open drain output that sinks current when the die temperature exceeds 145°C. 6090fe 10 For more information www.linear.com/LTC6090 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
