Datasheet LT3430, LT3430-1 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | High Voltage, 3A, 200kHz/100kHz Step-Down Switching Regulators |
| Pages / Page | 28 / 7 — BLOCK DIAGRAM. Figure 1. LT3430/LT3430-1 Block Diagram |
| File Format / Size | PDF / 335 Kb |
| Document Language | English |
BLOCK DIAGRAM. Figure 1. LT3430/LT3430-1 Block Diagram
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LT3430/LT3430-1
BLOCK DIAGRAM
The LT3430/LT3430-1 are constant frequency, current it much easier to frequency compensate the feedback loop mode buck converters. This means that there is an in- and also gives much quicker transient response. ternal clock and two feedback loops that control the duty Most of the circuitry of the LT3430/LT3430-1 operates cycle of the power switch. In addition to the normal error from an internal 2.9V bias line. The bias regulator normally amplifi er, there is a current sense amplifi er that monitors draws power from the regulator input pin, but if the BIAS switch current on a cycle-by-cycle basis. A switch cycle pin is connected to an external voltage equal to or higher starts with an oscillator pulse which sets the RS fl ip-fl op than 3V, bias power will be drawn from the external source to turn the switch on. When switch current reaches a level (typically the regulated output voltage). This will improve set by the inverting input of the comparator, the fl ip-fl op effi ciency if the BIAS pin voltage is lower than regulator is reset and the switch turns off. Output voltage control is input voltage. obtained by using the output of the error amplifi er to set the switch current trip point. This technique means that the High switch effi ciency is attained by using the BOOST pin error amplifi er commands current to be delivered to the to provide a voltage to the switch driver which is higher output rather than voltage. A voltage fed system will have than the input voltage, allowing switch to be saturated. low phase shift up to the resonant frequency of the inductor This boosted voltage is generated with an external ca- and output capacitor, then an abrupt 180° shift will occur. pacitor and diode. Two comparators are connected to the The current fed system will have 90° phase shift at a much shutdown pin. One has a 2.38V threshold for undervoltage lower frequency, but will not have the additional 90° shift lockout and the second has a 0.4V threshold for complete until well beyond the LC resonant frequency. This makes shutdown. VIN 3, 4 RLIMIT RSENSE 2.9V BIAS INTERNAL + – BIAS 10 REGULATOR VCC CURRENT COMPARATOR SLOPE COMP Σ SYNC 14 ANTISLOPE COMP BOOST 6 SHUTDOWN COMPARATOR 200kHz: LT3430 + – 100kHz: LT3430-1 S Q1 OSCILLATOR RS DRIVER POWER FLIP-FLOP CIRCUITRY SWITCH R 0.4V 5.5µA SW SHDN 15 + 2, 5 FREQUENCY – FOLDBACK LOCKOUT COMPARATOR ×1 Q2 FOLDBACK VC(MAX) Q3 CURRENT CLAMP LIMIT ERROR CLAMP AMPLIFIER – 12 FB gm = 2000µMho + 11 2.38V 1.22V VC GND 1, 8, 9, 16, 17 3430 F01
Figure 1. LT3430/LT3430-1 Block Diagram
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BLOCK DIAGRAM
The LT3430/LT3430-1 are constant frequency, current it much easier to frequency compensate the feedback loop mode buck converters. This means that there is an in- and also gives much quicker transient response. ternal clock and two feedback loops that control the duty Most of the circuitry of the LT3430/LT3430-1 operates cycle of the power switch. In addition to the normal error from an internal 2.9V bias line. The bias regulator normally amplifi er, there is a current sense amplifi er that monitors draws power from the regulator input pin, but if the BIAS switch current on a cycle-by-cycle basis. A switch cycle pin is connected to an external voltage equal to or higher starts with an oscillator pulse which sets the RS fl ip-fl op than 3V, bias power will be drawn from the external source to turn the switch on. When switch current reaches a level (typically the regulated output voltage). This will improve set by the inverting input of the comparator, the fl ip-fl op effi ciency if the BIAS pin voltage is lower than regulator is reset and the switch turns off. Output voltage control is input voltage. obtained by using the output of the error amplifi er to set the switch current trip point. This technique means that the High switch effi ciency is attained by using the BOOST pin error amplifi er commands current to be delivered to the to provide a voltage to the switch driver which is higher output rather than voltage. A voltage fed system will have than the input voltage, allowing switch to be saturated. low phase shift up to the resonant frequency of the inductor This boosted voltage is generated with an external ca- and output capacitor, then an abrupt 180° shift will occur. pacitor and diode. Two comparators are connected to the The current fed system will have 90° phase shift at a much shutdown pin. One has a 2.38V threshold for undervoltage lower frequency, but will not have the additional 90° shift lockout and the second has a 0.4V threshold for complete until well beyond the LC resonant frequency. This makes shutdown. VIN 3, 4 RLIMIT RSENSE 2.9V BIAS INTERNAL + – BIAS 10 REGULATOR VCC CURRENT COMPARATOR SLOPE COMP Σ SYNC 14 ANTISLOPE COMP BOOST 6 SHUTDOWN COMPARATOR 200kHz: LT3430 + – 100kHz: LT3430-1 S Q1 OSCILLATOR RS DRIVER POWER FLIP-FLOP CIRCUITRY SWITCH R 0.4V 5.5µA SW SHDN 15 + 2, 5 FREQUENCY – FOLDBACK LOCKOUT COMPARATOR ×1 Q2 FOLDBACK VC(MAX) Q3 CURRENT CLAMP LIMIT ERROR CLAMP AMPLIFIER – 12 FB gm = 2000µMho + 11 2.38V 1.22V VC GND 1, 8, 9, 16, 17 3430 F01
Figure 1. LT3430/LT3430-1 Block Diagram
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