Datasheet LTC6416 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 2GHz Low Noise Differential 16-Bit ADC Buffer |
| Pages / Page | 20 / 1 — FEATURES. DESCRIPTION. 2GHz –3dB Small Signal Bandwidth. 300MHz ±0.1dB … |
| File Format / Size | PDF / 401 Kb |
| Document Language | English |
FEATURES. DESCRIPTION. 2GHz –3dB Small Signal Bandwidth. 300MHz ±0.1dB Bandwidth. 1.8nV/√Hz Output Noise
Model Line for this Datasheet
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LTC6416 2 GHz Low Noise Differential 16-Bit ADC Buffer
FEATURES DESCRIPTION
n
2GHz –3dB Small Signal Bandwidth
The LTC®6416 is a differential unity gain buffer designed n
300MHz ±0.1dB Bandwidth
to drive 16-bit ADCs with extremely low output noise n
1.8nV/√Hz Output Noise
and excellent linearity beyond 300MHz. Differential input n
46.25dBm Equivalent OIP3 at 140MHz
impedance is 12kΩ, allowing 1:4 and 1:8 transformers to n
40.25dBm Equivalent OIP3 Up to 300MHz
be used at the input to achieve additional system gain. n
–81dBc/–72dBc HD2/HD3 at 140MHz, 2VP-P Out
With no external biasing or gain setting components and n
–84.5dBc IM3 at 140MHz, 2VP-P Out Composite
a fl ow-through pinout, the LTC6416 is very easy to use. n
–74dBc/–67.5dBc HD2/HD3 at 300MHz, 2VP-P Out
It can be DC-coupled and has a common mode output n
–72.5dBc IM3 at 300MHz, 2VP-P Out Composite
offset of –40mV. If the input signals are AC-coupled, the n
Programmable High Speed, Fast Recovery
LTC6416 input pins are internally biased to provide an
Output Clamping
output common mode voltage that is set by the voltage n DC-Coupled Signal Path on the VCM pin. n Operates on Single 2.7V to 3.9V Supply n Low Power: 150mW on 3.6V In addition the LTC6416 has high speed, fast recovery n 2mm × 3mm 10-Pin DFN Package clamping circuitry to limit output signal swing. Both the high and low clamp voltages are internally biased to allow maximum output swing but are also user programmable
APPLICATIONS
via the CLLO and CLHI pins. n Differential ADC Driver Supply current is nominally 42mA and the LTC6416 oper- n IF Sampling Receivers ates on supply voltages ranging from 2.7V to 3.9V. n Impedance Transformer The LTC6416 is packaged in a 10-lead 3mm n × 2mm DFN SAW Filter Interface package. Pinout is optimized for placement directly adjacent n CCD Buffer to Linear’s high speed 12-, 14- and 16-bit ADCs. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION LTC6416 Driving LTC2208 ADC with 1:8 Transformer fIN =140MHz, fS = 130MHz, –1dBFS, PGA = 1
0 V+ = 3.6V
LTC6416 Driving LTC2208 ADC – 140MHz IF
–10 HD2 = –94dBc –20 HD3 = –89.1dBc SFDR = 89.1dB 3.6V –30 SNR = 70.7dB –40 MEASURED USING DC1257B 680pF 0.1μF –50 WITH MINI-CIRCUIT TCM8-1+ 2.2μF 3.3V 1:8 TRANSFORMER –60 CLHI V+ 1.5pF –70 1:8 VCM 25Ω 200Ω IN+ –80 50Ω AIN+ AMPLITUDE (dBFS) OUT+ 16 –90 LTC6416 1pF LTC2208 + OUT– –100 200Ω – AIN– IN– GND 25Ω –110 GND 1.5pF PGA = 1 CLLO –120 6416 TA01a 0.1μF MINI-CIRCUITS 0 10 20 30 40 50 60 TCM8-1+ CLOCK FREQUENCY (MHz) (130MHz) 6416 TA01b 6416f 1
FEATURES DESCRIPTION
n
2GHz –3dB Small Signal Bandwidth
The LTC®6416 is a differential unity gain buffer designed n
300MHz ±0.1dB Bandwidth
to drive 16-bit ADCs with extremely low output noise n
1.8nV/√Hz Output Noise
and excellent linearity beyond 300MHz. Differential input n
46.25dBm Equivalent OIP3 at 140MHz
impedance is 12kΩ, allowing 1:4 and 1:8 transformers to n
40.25dBm Equivalent OIP3 Up to 300MHz
be used at the input to achieve additional system gain. n
–81dBc/–72dBc HD2/HD3 at 140MHz, 2VP-P Out
With no external biasing or gain setting components and n
–84.5dBc IM3 at 140MHz, 2VP-P Out Composite
a fl ow-through pinout, the LTC6416 is very easy to use. n
–74dBc/–67.5dBc HD2/HD3 at 300MHz, 2VP-P Out
It can be DC-coupled and has a common mode output n
–72.5dBc IM3 at 300MHz, 2VP-P Out Composite
offset of –40mV. If the input signals are AC-coupled, the n
Programmable High Speed, Fast Recovery
LTC6416 input pins are internally biased to provide an
Output Clamping
output common mode voltage that is set by the voltage n DC-Coupled Signal Path on the VCM pin. n Operates on Single 2.7V to 3.9V Supply n Low Power: 150mW on 3.6V In addition the LTC6416 has high speed, fast recovery n 2mm × 3mm 10-Pin DFN Package clamping circuitry to limit output signal swing. Both the high and low clamp voltages are internally biased to allow maximum output swing but are also user programmable
APPLICATIONS
via the CLLO and CLHI pins. n Differential ADC Driver Supply current is nominally 42mA and the LTC6416 oper- n IF Sampling Receivers ates on supply voltages ranging from 2.7V to 3.9V. n Impedance Transformer The LTC6416 is packaged in a 10-lead 3mm n × 2mm DFN SAW Filter Interface package. Pinout is optimized for placement directly adjacent n CCD Buffer to Linear’s high speed 12-, 14- and 16-bit ADCs. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION LTC6416 Driving LTC2208 ADC with 1:8 Transformer fIN =140MHz, fS = 130MHz, –1dBFS, PGA = 1
0 V+ = 3.6V
LTC6416 Driving LTC2208 ADC – 140MHz IF
–10 HD2 = –94dBc –20 HD3 = –89.1dBc SFDR = 89.1dB 3.6V –30 SNR = 70.7dB –40 MEASURED USING DC1257B 680pF 0.1μF –50 WITH MINI-CIRCUIT TCM8-1+ 2.2μF 3.3V 1:8 TRANSFORMER –60 CLHI V+ 1.5pF –70 1:8 VCM 25Ω 200Ω IN+ –80 50Ω AIN+ AMPLITUDE (dBFS) OUT+ 16 –90 LTC6416 1pF LTC2208 + OUT– –100 200Ω – AIN– IN– GND 25Ω –110 GND 1.5pF PGA = 1 CLLO –120 6416 TA01a 0.1μF MINI-CIRCUITS 0 10 20 30 40 50 60 TCM8-1+ CLOCK FREQUENCY (MHz) (130MHz) 6416 TA01b 6416f 1
