Datasheet AD8367 (Analog Devices) - 9

AD8367 250 0 90 120 60 200 –25 )
Ω
( )
Ω
150 30 150 –47 E ( C N 500mV 300mV ACTANCE 700mV 180 0 100 –73 RE ESISTA S R IE R E S 50 –95 210 330 0 –120
02710-015
0 100 200 300 400 500 240 300 FREQUENCY (MHz)
018
270
02710- Figure 15. Input Resistance and Series Reactance vs. Frequency Figure 18. Output Reflection Coefficient vs. Frequency from at VGAIN = 500 mV 10 MHz to 500 MHz for Multiple Values of VGAIN
90 0.5 120 60 VGAIN 0.4 150 0.3 30 VOUT 0.2 180 0 V) 0.1 V ( 0 300mV 210 330 –0.1 500mV 700mV –0.2 240 300 –0.3
02710-019 016
TIME (200ns/DIV) 270
02710- Figure 16. Input Reflection Coefficient vs. Figure 19. AGA Time Domain Response (3 dB Steps) Frequency from 10 MHz to 500 MHz for Multiple Values of VGAIN
70 20 25 65 15 20 ) 10nF
Ω
( ) 60 10
Ω
( 15 B) d 1nF ANCE 55 5 T ACTANCE 10pF IS S RE GAIN ( S 10 RE 100pF 50 0 IE R E S 5 45 –5 NO CAP 40 –10
02710-017
0
02710-020
0 100 200 300 400 500 0.1 1 10 100 1k 10k 100k FREQUENCY (MHz) FREQUENCY (kHz)
Figure 17. Output Resistance and Series Reactance vs. Figure 20. Gain vs. Frequency for Multiple Values of Frequency at VGAIN = 500 mV HPFL Capacitor at VGAIN = 500 mV Rev. A | Page 9 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT ATTENUATOR AND GAIN CONTROL INPUT AND OUTPUT INTERFACES POWER AND VOLTAGE METRICS NOISE AND DISTORTION OUTPUT CENTERING RMS DETECTION APPLICATIONS INPUT AND OUTPUT MATCHING VGA OPERATION MODULATED GAIN MODE AGC OPERATION MODIFYING THE AGC SETPOINT EVALUATION BOARD CHARACTERIZATION SETUP AND METHODS OUTLINE DIMENSIONS ORDERING GUIDE