Datasheet LT1224 (Analog Devices) - 7

ManufacturerAnalog Devices
DescriptionVery High Speed Operational Amplifier
Pages / Page8 / 7 — APPLICATI. S I FOR ATIO. Capacitive Loading. Cable Driving. AV = –1, CL = …
File Format / SizePDF / 217 Kb
Document LanguageEnglish

APPLICATI. S I FOR ATIO. Capacitive Loading. Cable Driving. AV = –1, CL = 1000pF. AV = 1, CL = 10,000pF

APPLICATI S I FOR ATIO Capacitive Loading Cable Driving AV = –1, CL = 1000pF AV = 1, CL = 10,000pF

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LT1224
O U U W U APPLICATI S I FOR ATIO Capacitive Loading
The LT1224 is stable with all capacitive loads. This is
Cable Driving
accomplished by sensing the load induced output pole and adding compensation at the amplifier gain node. As the + R3 capacitive load increases, both the bandwidth and phase IN V 75 CABLE Ω 75 Ω LT1224 margin decrease so there will be peaking in the frequency OUT V – domain and in the transient response. The photo of the R4 R1 75Ω small-signal response with 1000pF load shows 50% peak- 1k ing. The large-signal response with a 10,000pF load shows R2 the output slew rate being limited by the short-circuit 1k current. LT1224 • TA07
AV = –1, CL = 1000pF AV = 1, CL = 10,000pF DAC Current-to-Voltage Converter
The wide bandwidth, high slew rate and fast settling time of the LT1224 make it well-suited for current-to-voltage conversion after current output D/A converters. A typical application is shown on the first page of this data sheet with a DAC-08 type converter with a full-scale output of 2mA. A compensation capacitor is used across the feed- back resistor to null the pole at the inverting input caused LT1224 • TA06 by the DAC output capacitance. The combination of the The LT1224 can drive coaxial cable directly, but for best LT1224 and DAC settles to 40mV in 140ns for both a 0V pulse fidelity the cable should be doubly terminated with to 10V step and for a 10V to 0V step. a resistor in series with the output.
O U TYPICAL APPLICATI S 1MHz, 2nd Order Butterworth Filter Two Op Amp Instrumentation Amplifier
R2 R5 R4 619Ω 220Ω 10k R1 R2 C2 10k 1k 100pF R1 R3 619Ω 825Ω R3 – V 1k IN – LT1224 – LT1224 VOUT – + LT1224 V C1 + OUT 500pF VIN + + R4 R2 A [ 1 ( R3 ) R2 + R3 ] V = 1 + + + = 102 –38dB AT 10MHz R3 2 R1 R4 R5 LT1224 • TA08 SMALL SIGNAL OVERSHOOT = 10% TRIM R5 FOR GAIN LT1224 • TA09 TRIM R1 FOR COMMON-MODE REJECTION BW = 430kHz Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of circuits as described herein will not infringe on existing patent rights. 7