Datasheet ADP5303 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 50 mA/500 mA, Ultralow Power Step-Down Regulator with Battery Voltage Monitor |
| Pages / Page | 21 / 3 — Data Sheet. ADP5303. DETAILED FUNCTIONAL BLOCK DIAGRAM. PVIN. VINOK. … |
| Revision | B |
| File Format / Size | PDF / 768 Kb |
| Document Language | English |
Data Sheet. ADP5303. DETAILED FUNCTIONAL BLOCK DIAGRAM. PVIN. VINOK. VINOK_TH. DRIVER. LIM_PWM. ILIM_HYS. CONTROL. –0.6A(PWM). LOGIC. 0A(HYS)
Model Line for this Datasheet
Text Version of Document
Data Sheet ADP5303 DETAILED FUNCTIONAL BLOCK DIAGRAM PVIN VINOK PVIN VINOK_TH PVIN I DRIVER LIM_PWM SW ILIM_HYS CONTROL –0.6A(PWM) LOGIC 0A(HYS) PVIN PWM DRIVER Σ PGND SLOPE COMPENSATION STANDBY 0.808V 0.8V FB INTERNAL FEEDBACK RESISTOR 0.8V DIVIDER VID V TO I MODE 1.2V 0.4V SOFT AGND START EN BAND GAP BIAS AND PVIN HOUSEKEEPING UVLO 2.06V 2.00V 1.2V 0.4V SYNC 2MHz SYNC/ OSC MODE MODE KEEP ALIVE BLOCK ADP5303
2 00 4- 44 13 Figure 2. Detailed Functional Block Diagram Rev. A | Page 3 of 21 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode Hysteresis Mode Mode Selection OSCILLATOR AND SYNCHRONIZATION ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY CYCLE OPERATION ACTIVE DISCHARGE VINOK FUNCTION THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
2 00 4- 44 13 Figure 2. Detailed Functional Block Diagram Rev. A | Page 3 of 21 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode Hysteresis Mode Mode Selection OSCILLATOR AND SYNCHRONIZATION ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY CYCLE OPERATION ACTIVE DISCHARGE VINOK FUNCTION THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
