Datasheet ADP5302 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 50 mA/500 mA, Ultralow Power Step-Down Regulator with Battery Voltage Monitor |
| Pages / Page | 22 / 6 — ADP5302. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL … |
| Revision | A |
| File Format / Size | PDF / 758 Kb |
| Document Language | English |
ADP5302. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE. Parameter Rating. Table 3. Thermal Resistance
Model Line for this Datasheet
Text Version of Document
ADP5302 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating
θJA is specified for the worst-case conditions, that is, a device PVIN to PGND −0.3 V to +7 V soldered in a circuit board for surface-mount packages. θJC is SW to PGND −0.3 V to PVIN + 0.3 V the thermal resistance from the operating portion of the device FB to AGND −0.3 V to +7 V to the outside surface of the package (case) closest to the device VID to AGND −0.3 V to +7 V mounting area. EN to AGND −0.3 V to +7 V
Table 3. Thermal Resistance
VINOK to AGND −0.3 V to +7 V
Package Type θ
SYNC/MODE to AGND −0.3 V to +7 V
JA θJC Unit
STOP to AGND −0.3 V to +7 V 10-Lead, 3 mm × 3 mm LFCSP 57 0.86 °C/W PGND to AGND −0.3 V to +0.3 V Storage Temperate Range −65°C to +150°C
ESD CAUTION
Operational Junction Temperature Range −40°C to +125°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 6 of 22 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode Hysteresis Mode Mode Selection OSCILLATOR AND SYNCHRONIZATION ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE VINOK FUNCTION STOP SWITCHING THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
θJA is specified for the worst-case conditions, that is, a device PVIN to PGND −0.3 V to +7 V soldered in a circuit board for surface-mount packages. θJC is SW to PGND −0.3 V to PVIN + 0.3 V the thermal resistance from the operating portion of the device FB to AGND −0.3 V to +7 V to the outside surface of the package (case) closest to the device VID to AGND −0.3 V to +7 V mounting area. EN to AGND −0.3 V to +7 V
Table 3. Thermal Resistance
VINOK to AGND −0.3 V to +7 V
Package Type θ
SYNC/MODE to AGND −0.3 V to +7 V
JA θJC Unit
STOP to AGND −0.3 V to +7 V 10-Lead, 3 mm × 3 mm LFCSP 57 0.86 °C/W PGND to AGND −0.3 V to +0.3 V Storage Temperate Range −65°C to +150°C
ESD CAUTION
Operational Junction Temperature Range −40°C to +125°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 6 of 22 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode Hysteresis Mode Mode Selection OSCILLATOR AND SYNCHRONIZATION ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE VINOK FUNCTION STOP SWITCHING THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
