Datasheet ADP5051 (Analog Devices) - 6

ADP5051 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INTERNAL REGULATORS VDD Output Voltage VVDD 3.2 3.305 3.4 V IVDD = 10 mA Current Limit ILIM_VDD 20 51 80 mA VREG Output Voltage VVREG 4.9 5.1 5.3 V Dropout Voltage VDROPOUT 225 mV IVREG = 50 mA Current Limit ILIM_VREG 50 95 140 mA LOW INPUT VOLTAGE DETECTION Threshold VLVIN-TH 4.07 4.236 4.39 V LVIN_TH[3:0] = 0000 10.05 10.25 10.4 V LVIN_TH[3:0] = 1100 Threshold Range 4.2 11.2 V I2C programmable (4-bit value) THERMAL SHUTDOWN (TSD) Threshold TSHDN 150 °C Hysteresis THYS 15 °C THERMAL OVERHEAT WARNING Threshold THOT 115 °C TEMP_TH[1:0] = 10 Threshold Range 105 125 °C I2C programmable (2-bit value) Hysteresis THOT (HYS) 5 °C
BUCK REGULATOR SPECIFICATIONS
VIN = 12 V, VVREG = 5.1 V, fSW = 600 kHz for all channels, TJ = −40°C to +125°C for minimum and maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
CHANNEL 1 SYNC BUCK REGULATOR FB1 Pin Fixed Output Options VOUT1 0.85 1.60 V Fuse trim or I2C interface (5-bit value) Adjustable Feedback Voltage VFB1 0.800 V Feedback Voltage Accuracy VFB1 (DEFAULT) −0.55 +0.55 % TJ = 25°C −1.25 +1.0 % 0°C ≤ TJ ≤ 85°C −1.5 +1.5 % −40°C ≤ TJ ≤ +125°C Feedback Bias Current IFB1 0.1 µA Adjustable voltage SW1 Pin High-Side Power FET On Resistance RDSON (1H) 100 mΩ Pin-to-pin measurement Current-Limit Threshold ITH (ILIM1) 3.50 4.4 5.28 A RILIM1 = floating 1.91 2.63 3.08 A RILIM1 = 47 kΩ 4.95 6.44 7.48 A RILIM1 = 22 kΩ Minimum On Time tMIN_ON1 117 155 ns fSW = 250 kHz to 1.4 MHz Minimum Off Time tMIN_OFF1 1/9 × tSW ns fSW = 250 kHz to 1.4 MHz Low-Side Driver, DL1 Pin Rising Time tRISING1 20 ns CISS = 1.2 nF Falling Time tFALLING1 3.4 ns CISS = 1.2 nF Sourcing Resistor tSOURCING1 10 Ω Sinking Resistor tSINKING1 0.95 Ω Error Amplifier (EA), COMP1 Pin EA Transconductance gm1 310 470 620 µS Rev. B | Page 6 of 55 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS SUPERVISORY SPECIFICATIONS I2C INTERFACE TIMING SPECIFICATIONS Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES Pulse-Width Modulation (PWM) Mode Power Save Mode (PSM) Forced PWM and Automatic PWM/PSM Modes ADJUSTABLE AND FIXED OUTPUT VOLTAGES DYNAMIC VOLTAGE SCALING (DVS) INTERNAL REGULATORS (VREG AND VDD) SEPARATE SUPPLY APPLICATIONS LOW-SIDE DEVICE SELECTION BOOTSTRAP CIRCUITRY ACTIVE OUTPUT DISCHARGE SWITCH PRECISION ENABLING OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT SOFT START PARALLEL OPERATION STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLDBACK Pulse Skip Mode Under Maximum Duty Cycle HICCUP PROTECTION LATCH-OFF PROTECTION Short-Circuit Latch-Off Mode Overvoltage Latch-Off Mode UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FUNCTION INTERRUPT FUNCTION THERMAL SHUTDOWN OVERHEAT DETECTION LOW INPUT VOLTAGE DETECTION SUPERVISORY CIRCUIT Reset Output Watchdog Input Manual Reset Input Processor Manual Reset Mode Power On/Off Switch Mode I2C INTERFACE SDA AND SCL PINS I2C ADDRESSES SELF-CLEAR REGISTER BITS I2C INTERFACE TIMING DIAGRAMS APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL PROGRAMMING THE ADJUSTABLE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION LOW-SIDE POWER DEVICE SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CURRENT LIMIT SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR SELECTING THE LOW-SIDE MOSFET DESIGNING THE COMPENSATION NETWORK SELECTING THE SOFT START TIME SELECTING THE INPUT CAPACITOR RECOMMENDED EXTERNAL COMPONENTS CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS REGISTER MAP DETAILED REGISTER DESCRIPTIONS REGISTER 1: PCTRL (CHANNEL ENABLE CONTROL), ADDRESS 0x01 REGISTER 2: VID1 (VID SETTING FOR CHANNEL 1), ADDRESS 0x02 REGISTER 3: VID23 (VID SETTING FOR CHANNEL 2 AND CHANNEL 3), ADDRESS 0x03 REGISTER 4: VID4 (VID SETTING FOR CHANNEL 4), ADDRESS 0x04 REGISTER 5: DVS_CFG (DVS CONFIGURATION FOR CHANNEL 1 AND CHANNEL 4), ADDRESS 0x05 REGISTER 6: OPT_CFG (FPWM/PSM MODE AND OUTPUT DISCHARGE FUNCTION CONFIGURATION), ADDRESS 0x06 REGISTER 7: LCH_CFG (SHORT-CIRCUIT LATCH-OFF AND OVERVOLTAGE LATCH-OFF CONFIGURATION), ADDRESS 0x07 REGISTER 8: SW_CFG (SWITCHING FREQUENCY AND PHASE SHIFT CONFIGURATION), ADDRESS 0x08 REGISTER 9: TH_CFG (TEMPERATURE WARNING AND LOW VIN WARNING THRESHOLD CONFIGURATION), ADDRESS 0x09 REGISTER 10: HICCUP_CFG (HICCUP CONFIGURATION), ADDRESS 0x0A REGISTER 11: PWRGD_MASK (CHANNEL MASK CONFIGURATION FOR PWRGD PIN), ADDRESS 0x0B REGISTER 12: LCH_STATUS (LATCH-OFF STATUS READBACK), ADDRESS 0x0C REGISTER 13: STATUS_RD (STATUS READBACK), ADDRESS 0x0D REGISTER 14: INT_STATUS (INTERRUPT STATUS READBACK), ADDRESS 0x0E REGISTER 15: INT_MASK (INTERRUPT MASK CONFIGURATION), ADDRESS 0x0F REGISTER 16: FORCE_SHUT (FORCED SHUT DOWN), ADDRESS 0x10 REGISTER 17: DEFAULT_SET (DEFAULT RESET), ADDRESS 0x11 FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE