Datasheet ADP5041 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Micro PMU with 1.2 A Buck, Two 300 mA LDOs, Supervisory, Watchdog, and Manual Reset |
| Pages / Page | 40 / 8 — ADP5041. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. TOP … |
| Revision | B |
| File Format / Size | PDF / 3.7 Mb |
| Document Language | English |
ADP5041. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. TOP VIEW. (Not to Scale). HR T. FB3 1. 15 FB2. VOUT3 2. 14 VOUT2. VIN3 3
Text Version of Document
ADP5041 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADP5041 TOP VIEW (Not to Scale) DE DI HR T O N2 MR W V M E 20 19 18 17 16 FB3 1 15 FB2 VOUT3 2 14 VOUT2 VIN3 3 13 VIN2 EN3 4 12 FB1 nRSTO 5 11 VOUT1 6 7 8 9 10 N N1 VI I SW ND N1 A V G E P NOTES
002
1. EXPOSED PAD MUST BE CONNECTED TO SYSTEM GROUND PLANE.
09652- Figure 2. Pin Configuration—View from Top of the Die
Table 8. Pin Function Descriptions Pin No. Mnemonic Description
1 FB3 LDO2 Feedback Input. 2 VOUT3 LDO2 Output Voltage. 3 VIN3 LDO2 Input Supply (1.7 V to 5.5 V). 4 EN3 Enable LDO2. EN3 = high: turn on LDO2; EN3 = low: turn off LDO2. 5 nRSTO Open-Drain Reset Output, Active Low. 6 AVIN Housekeeping and Supervisory Input Supply (2.3 V to 5.5 V). 7 VIN1 Buck Input Supply (2.3 V to 5.5 V). 8 SW Buck Switching Node. 9 PGND Dedicated Power Ground for Buck Regulator. 10 EN1 Enable Buck. EN1 = high: turn on buck; EN1 = low: turn off buck. 11 VOUT1 Buck Output Sensing Node. 12 FB1 Buck Feedback Input. 13 VIN2 LDO1 Input Supply (1.7 V to 5.5 V). 14 VOUT2 LDO1 Output Voltage. 15 FB2 LDO1 Feedback Input. 16 EN2 Enable LDO1. EN2 = high: turn on LDO1; EN2 = low: turn off LDO1. 17 MODE Buck Mode. MODE = high; buck regulator operates in fixed PWM mode; MODE = low; buck regulator operates in power saving mode (PSM) at light load and in constant PWM at higher load. 18 VTHR Reset Threshold Programming. 19 WDI Watchdog Refresh Input from Processor. If WDI is in high-Z, watchdog is disabled. 20 MR Manual Reset Input, Active Low. 0 EPAD Exposed Pad (Analog Ground). The exposed pad must be connected to the system ground plane. Rev. A | Page 8 of 40 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS SUPERVISORY SPECIFICATIONS BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown Active Pull-Down BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog Input APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO EXTERNAL COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITOR Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Threshold Setting Resistors Watchdog Input Current Negative-Going Transients at the Monitored Rail Watchdog Software Considerations POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature APPLICATION DIAGRAM PCB LAYOUT GUIDELINES SUGGESTED LAYOUT BILL OF MATERIALS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
002
1. EXPOSED PAD MUST BE CONNECTED TO SYSTEM GROUND PLANE.
09652- Figure 2. Pin Configuration—View from Top of the Die
Table 8. Pin Function Descriptions Pin No. Mnemonic Description
1 FB3 LDO2 Feedback Input. 2 VOUT3 LDO2 Output Voltage. 3 VIN3 LDO2 Input Supply (1.7 V to 5.5 V). 4 EN3 Enable LDO2. EN3 = high: turn on LDO2; EN3 = low: turn off LDO2. 5 nRSTO Open-Drain Reset Output, Active Low. 6 AVIN Housekeeping and Supervisory Input Supply (2.3 V to 5.5 V). 7 VIN1 Buck Input Supply (2.3 V to 5.5 V). 8 SW Buck Switching Node. 9 PGND Dedicated Power Ground for Buck Regulator. 10 EN1 Enable Buck. EN1 = high: turn on buck; EN1 = low: turn off buck. 11 VOUT1 Buck Output Sensing Node. 12 FB1 Buck Feedback Input. 13 VIN2 LDO1 Input Supply (1.7 V to 5.5 V). 14 VOUT2 LDO1 Output Voltage. 15 FB2 LDO1 Feedback Input. 16 EN2 Enable LDO1. EN2 = high: turn on LDO1; EN2 = low: turn off LDO1. 17 MODE Buck Mode. MODE = high; buck regulator operates in fixed PWM mode; MODE = low; buck regulator operates in power saving mode (PSM) at light load and in constant PWM at higher load. 18 VTHR Reset Threshold Programming. 19 WDI Watchdog Refresh Input from Processor. If WDI is in high-Z, watchdog is disabled. 20 MR Manual Reset Input, Active Low. 0 EPAD Exposed Pad (Analog Ground). The exposed pad must be connected to the system ground plane. Rev. A | Page 8 of 40 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS SUPERVISORY SPECIFICATIONS BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown Active Pull-Down BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog Input APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO EXTERNAL COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITOR Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Threshold Setting Resistors Watchdog Input Current Negative-Going Transients at the Monitored Rail Watchdog Software Considerations POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature APPLICATION DIAGRAM PCB LAYOUT GUIDELINES SUGGESTED LAYOUT BILL OF MATERIALS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
