Datasheet ADP5041 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Micro PMU with 1.2 A Buck, Two 300 mA LDOs, Supervisory, Watchdog, and Manual Reset |
| Pages / Page | 40 / 9 — Data Sheet. ADP5041. TYPICAL PERFORMANCE CHARACTERISTICS. VOUT1. VOUT2. … |
| Revision | B |
| File Format / Size | PDF / 3.7 Mb |
| Document Language | English |
Data Sheet. ADP5041. TYPICAL PERFORMANCE CHARACTERISTICS. VOUT1. VOUT2. VOUT3. IIN. CH4 2.0V/DIV 1MΩ BW 500M. A CH2 1.88V. 200µs/DIV
Text Version of Document
Data Sheet ADP5041 TYPICAL PERFORMANCE CHARACTERISTICS
VIN1 = VIN2 = VIN3 = AVIN = 5.0 V, TA = 25°C, unless otherwise noted.
SW 4 VOUT1 2 VOUT1 2 VOUT2 3 EN VOUT3 4 1 IIN
3
3
00 -006 2- 652 965 0 09
CH4 2.0V/DIV 1MΩ BW 500M A CH2 1.88V 200µs/DIV CH1 4.0V/DIV 1MΩ B A CH1 2.32V 50µs/DIV W 20.0M CH2 2.0V/DIV 1MΩ B 1.0MS/s 2.0MS/s W 20.0M CH2 3.0V/DIV 1MΩ BW 500M CH3 2.0V/DIV 1MΩ B 1.0µs/pt 500ns/pt W 500M CH3 200mA/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ BW 500M
Figure 3. 3-Channel Start-Up Waveforms Figure 6. Buck Startup, VOUT1 = 3.3 V, IOUT2 = 20 mA
VOUT3 SW 4 4 VOUT2 2 VOUT1 2 VOUT1 1 EN 1 IIN IIN
4
3 3
-00 -007 2 65 652 09 09
CH1 2.0V/DIV 1MΩ B A CH1 1.08V 200µs/DIV W 20.0M CH1 8.0V/DIV 1MΩ B A CH1 1.12V 50µs/DIV W 20.0M CH2 5.0MS/s 2.0V/DIV 1MΩ B 2.0MS/s W 20.0M CH2 2.0V/DIV 1MΩ BW 500.0M CH3 200ns/pt 300mA/DIV 1MΩ B 500ns/pt W 20.0M CH3 200mA/DIV 1MΩ BW 20.0M CH4 2.0V/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ BW 500.0M
Figure 4. Total Inrush Current, All Channels Started Simultaneously Figure 7. Buck Startup, VOUT1 = 1.8 V, IOUT = 20 mA
1.0 0.9 SW 0.8 4 0.7 0.6 ) A VOUT1 (m 0.5 2 I IN 0.4 0.3 EN 1 0.2 IIN 0.1 3
-008 652
0
09 05
2.4 2.9 3.4 3.9 4.4 4.9 5.4
0 2-
CH1 8.0V/DIV 1MΩ B A CH1 640mV 50µs/DIV W 20.0M V 2.0MS/s IN (V)
965
CH2 2.0V/DIV 1MΩ B
0
W 500.0M CH3 500ns/pt 200mA/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ BW 500.0M
Figure 5. System Quiescent Current (Sum of All the Input Currents) vs. Figure 8. Buck Startup, VOUT1 = 1.2 V, IOUT = 20 mA Input Voltage, VOUT1 = 1.8 V, VOUT2 = VOUT3 = 3.3 V, (UVLO = 3.3 V) Rev. A | Page 9 of 40 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS SUPERVISORY SPECIFICATIONS BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown Active Pull-Down BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog Input APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO EXTERNAL COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITOR Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Threshold Setting Resistors Watchdog Input Current Negative-Going Transients at the Monitored Rail Watchdog Software Considerations POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature APPLICATION DIAGRAM PCB LAYOUT GUIDELINES SUGGESTED LAYOUT BILL OF MATERIALS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
VIN1 = VIN2 = VIN3 = AVIN = 5.0 V, TA = 25°C, unless otherwise noted.
SW 4 VOUT1 2 VOUT1 2 VOUT2 3 EN VOUT3 4 1 IIN
3
3
00 -006 2- 652 965 0 09
CH4 2.0V/DIV 1MΩ BW 500M A CH2 1.88V 200µs/DIV CH1 4.0V/DIV 1MΩ B A CH1 2.32V 50µs/DIV W 20.0M CH2 2.0V/DIV 1MΩ B 1.0MS/s 2.0MS/s W 20.0M CH2 3.0V/DIV 1MΩ BW 500M CH3 2.0V/DIV 1MΩ B 1.0µs/pt 500ns/pt W 500M CH3 200mA/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ BW 500M
Figure 3. 3-Channel Start-Up Waveforms Figure 6. Buck Startup, VOUT1 = 3.3 V, IOUT2 = 20 mA
VOUT3 SW 4 4 VOUT2 2 VOUT1 2 VOUT1 1 EN 1 IIN IIN
4
3 3
-00 -007 2 65 652 09 09
CH1 2.0V/DIV 1MΩ B A CH1 1.08V 200µs/DIV W 20.0M CH1 8.0V/DIV 1MΩ B A CH1 1.12V 50µs/DIV W 20.0M CH2 5.0MS/s 2.0V/DIV 1MΩ B 2.0MS/s W 20.0M CH2 2.0V/DIV 1MΩ BW 500.0M CH3 200ns/pt 300mA/DIV 1MΩ B 500ns/pt W 20.0M CH3 200mA/DIV 1MΩ BW 20.0M CH4 2.0V/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ BW 500.0M
Figure 4. Total Inrush Current, All Channels Started Simultaneously Figure 7. Buck Startup, VOUT1 = 1.8 V, IOUT = 20 mA
1.0 0.9 SW 0.8 4 0.7 0.6 ) A VOUT1 (m 0.5 2 I IN 0.4 0.3 EN 1 0.2 IIN 0.1 3
-008 652
0
09 05
2.4 2.9 3.4 3.9 4.4 4.9 5.4
0 2-
CH1 8.0V/DIV 1MΩ B A CH1 640mV 50µs/DIV W 20.0M V 2.0MS/s IN (V)
965
CH2 2.0V/DIV 1MΩ B
0
W 500.0M CH3 500ns/pt 200mA/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ BW 500.0M
Figure 5. System Quiescent Current (Sum of All the Input Currents) vs. Figure 8. Buck Startup, VOUT1 = 1.2 V, IOUT = 20 mA Input Voltage, VOUT1 = 1.8 V, VOUT2 = VOUT3 = 3.3 V, (UVLO = 3.3 V) Rev. A | Page 9 of 40 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS SUPERVISORY SPECIFICATIONS BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown Active Pull-Down BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog Input APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO EXTERNAL COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITOR Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Threshold Setting Resistors Watchdog Input Current Negative-Going Transients at the Monitored Rail Watchdog Software Considerations POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature APPLICATION DIAGRAM PCB LAYOUT GUIDELINES SUGGESTED LAYOUT BILL OF MATERIALS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
