Datasheet ADP5042 (Analog Devices) - 7

Data Sheet ADP5042 ABSOLUTE MAXIMUM RATINGS
Junction-to-ambient thermal resistance (θ
Table 6.
JA) of the package is based on modeling and calculation using a 4-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent on AVIN, VINx, VOUTx, ENx, MODE, MR, WDIx, −0.3 V to +6 V the application and board layout. In applications where high WMOD, WSTAT, nRSTO to GND maximum power dissipation exists, close attention to thermal Storage Temperature Range −65°C to +150°C board design is required. The value of θJA may vary, depending on Operating Junction Temperature Range −40°C to +125°C PCB material, layout, and environmental conditions. The specified Soldering Conditions JEDEC J-STD-020 value of θJA is based on a four-layer, 4” × 3”, 2.5 oz copper board, ESD Human Body Model 3000 V as per JEDEC standard. For additional information, see the ESD Charged Device Model 1500 V AN-772 Application Note, A Design and Manufacturing Guide ESD Machine Model 100 V for the Lead Frame Chip Scale (LFCSP). Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a
THERMAL RESISTANCE
stress rating only; functional operation of the product at these Thermal performance is directly linked to PCB design and or any other conditions above those indicated in the operational operating environment. Careful attention to PCB thermal section of this specification is not implied. Operation beyond design is required. the maximum operating conditions for extended periods may affect product reliability.
Table 7. Thermal Resistance THERMAL DATA Package Type θJA θJC Unit
20-Lead, 0.5 mm pitch LFCSP 38 4.2 °C/W Absolute maximum ratings apply individually only, not in combination. The ADP5042 can be damaged when the junction temperature
ESD CAUTION
limits are exceeded. Monitoring ambient temperature does not guarantee that the junction temperature is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature of the device is dependent on the ambient temperature, the power dissipation of the device (PD), and the junction-to-ambient thermal resistance of the package. Maximum junction temperature is calculated from the ambient temperature and power dissipation using the formula TJ = TA + (PD × θJA) Rev. B | Page 7 of 30 Document Outline FEATURES HIGH LEVEL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATION SUPERVISORY SPECIFICATION BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog 1 Input Watchdog 2 Input Watchdog Status Indicator APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Inductor Output Capacitor Input Capacitor LDO CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Watchdog 1 Input Current Negative-Going VCC Transients Watchdog Software Considerations PCB LAYOUT GUIDELINES EVALUATION BOARD SCHEMATICS AND ARTWORK SUGGESTED LAYOUT BILL OF MATERIALS APPLICATION DIAGRAM FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE