Datasheet ADP5042 (Analog Devices) - 8

ADP5042 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D 1 DE DI MO O N2 MR W W M E 20 19 18 17 16 NC 1 15 WSTAT VOUT3 2 ADP5042 14 VOUT2 VIN3 3 13 VIN2 TOP VIEW EN3 4 (Not to Scale) 12 WDI2 nRSTO 5 11 VOUT1 6 7 8 9 10 N N1 VI I SW ND N1 A V G E P NOTES
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1. EXPOSED PAD SHOULD BE CONNECTED TO AGND. 2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
08811- Figure 2. Pin Configuration—View from Top of the Die
Table 8. Preliminary Pin Function Descriptions Pin No. Mnemonic Description
1 NC No Connect. Do not connect to this pin. 2 VOUT3 LDO2 Output Voltage and Sensing Input. 3 VIN3 LDO2 Input Supply (1.7 V to 5.5 V). 4 EN3 Enable LDO2. EN3 = high: turn on LDO2; EN3 = low: turn off LDO2. 5 nRSTO Open-Drain Reset Output, Active Low. 6 AVIN Regulators Housekeeping and Supervisory Input Supply (2.3 V to 5.5 V). 7 VIN1 Buck Input Supply (2.3 V to 5.5 V). 8 SW Buck Switching Node. 9 PGND Dedicated Power Ground for Buck Regulator. 10 EN1 Enable Buck. EN1 = high: turn on buck; EN1 = low: turn off buck. 11 VOUT1 Buck Sensing Node. 12 WDI2 Watchdog 2 (Long Timeout) Refresh Input from Processor. Can be disabled only by factory option. 13 VIN2 LDO1 Input Supply (1.7 V to 5.5 V). 14 VOUT2 LDO1 Output Voltage and Sensing Input. 15 WSTAT Open-Drain Watchdog Timeout Status. WSTAT = high: Watchdog 1 timeout or power-on reset; WSTAT = low: Watchdog 2 timeout. Auto cleared after one second. 16 EN2 Enable LDO1. EN2 = high: turn on LDO1. EN2 = low: turn off LDO1. 17 MODE Buck Mode. MODE = high: buck regulator operates in fixed PWM mode; MODE = low: buck regulator operates in pulse skipping mode (PSM) at light load and in constant PWM at higher load. 18 WMOD Watchdog Mode. WMOD = low: Watchdog 1 normal mode; WMOD = high: Watchdog 1 cannot be disabled by a three-state condition applied on WDI1. 19 WDI1 Watchdog 1 Refresh Input from Processor. If WDI1 is in high-Z and WMOD is low, Watchdog 1 is disabled. 20 MR Manual Reset Input, Active Low. EPAD Exposed Pad. The exposed pad should be connected to analog ground (AGND). Rev. B | Page 8 of 30 Document Outline FEATURES HIGH LEVEL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATION SUPERVISORY SPECIFICATION BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION SUPERVISORY SECTION Reset Output Manual Reset Input Watchdog 1 Input Watchdog 2 Input Watchdog Status Indicator APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Inductor Output Capacitor Input Capacitor LDO CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties SUPERVISORY SECTION Watchdog 1 Input Current Negative-Going VCC Transients Watchdog Software Considerations PCB LAYOUT GUIDELINES EVALUATION BOARD SCHEMATICS AND ARTWORK SUGGESTED LAYOUT BILL OF MATERIALS APPLICATION DIAGRAM FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE