Datasheet ADP2116 (Analog Devices) - 3

Data Sheet ADP2116 SPECIFICATIONS
If unspecified, VDD = VINx = EN1 = EN2 = 5.0 V. The minimum and maximum specifications are valid for TJ = −40°C to +125°C, unless otherwise specified. Typical values are at TJ = 25°C. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
Table 1. Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY VDD Bias Voltage VDD 2.75 5.5 V Undervoltage Lockout Threshold UVLO VDD rising 2.65 2.75 V VDD falling 2.35 2.47 Undervoltage Lockout Hysteresis 0.18 V Quiescent Current IDD,CH1 EN1 = VDD = 5 V, EN2 = GND, VFB1 = VDD, 1.7 2.5 mA OPCFG = GND IDD,CH2 EN2 = VDD = 5 V, EN1 = GND, VFB2 = VDD, 1.7 2.5 mA OPCFG = GND IDD,CH1 + CH2 EN1 = EN2 = VDD = 5 V, VFB2 = VFB1 = VDD, 3.0 4.0 mA OPCFG = GND Shutdown Current IDD,SD EN1 = EN2 = GND, VDD = VINx = 2.75 V to 5.5 V, 1.0 10 μA TJ = −40°C to +115°C ERROR INTEGRATOR (OPERATIONAL TRANSCONDUCTANCE AMPLIFIER) FB1, FB2 Input Bias Current IFB Adjustable output, VFBx = 0.6 V, 1 65 nA V1SET, V2SET = VDD or via 82 kΩ to GND Fixed output, VFBx = 1.2 V, 11 15 μA V1SET, V2SET via 4.7 kΩ to GND Transconductance gm 550 μA/V COMPx VOLTAGE RANGE COMPx Zero-Current Threshold VCOMP, ZCT Guaranteed by design 1.12 V COMPx Clamp High Voltage VCOMP, HI VDD = VINx = 2.75 V to 5.5 V 2.36 2.45 V COMPx Clamp Low Voltage VCOMP, LO VDD = VINx = 2.75 V to 5.5 V 0.65 0.70 V OUTPUT CHARACTERISTICS Output Voltage Accuracy VFB Adjustable output, TJ = 25°C, 0.597 0.600 0.603 V V1SET, V2SET = VDD or via 82 kΩ to GND Adjustable output, TJ = −40°C to +125°C, 0.594 0.600 0.606 V V1SET, V2SET = VDD or via 82 kΩ to GND VFB ERROR Fixed output, TJ = 25°C, V1SET, V2SET = GND −1.0 +1.0 % or via 4.7 kΩ, 8.2 kΩ, 15 kΩ, 27 kΩ, 47 kΩ to GND Fixed output, TJ = −40°C to +125°C, −1.5 +1.5 % V1SET, V2SET = GND or via 4.7 kΩ, 8.2 kΩ, 15 kΩ, 27 kΩ, 47 kΩ to GND Line Regulation VDD = VINx = 2.75 V to 5.5 V 0.05 %/V Load Regulation VDD = VINx = 2.75 V to 5.5 V 0.03 %/A OSCILLATOR All oscillator parameters provided for VDD = 2.75 V to 5.5 V Switching Frequency fSW FREQ tied to GND 255 300 345 kHz FREQ via 8.2 kΩ to GND 510 600 690 kHz FREQ via 27 kΩ to GND 1020 1200 1380 kHz SYNC Frequency Range fSYNC fSYNC = 2 × fSW FREQ tied to GND 400 1000 kHz FREQ via 8.2 kΩ to GND 800 2000 kHz FREQ via 27 kΩ to GND 1600 4000 kHz SYNC Input Pulse Width 100 ns Rev. B | Page 3 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS LINE AND LOAD REGULATION SUPPLY CURRENT LOAD TRANSIENT RESPONSE BASIC FUNCTIONALITY BODE PLOTS SIMPLIFIED BLOCK DIAGRAM THEORY OF OPERATION CONTROL ARCHITECTURE UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CONTROL SOFT START POWER GOOD PULSE SKIP MODE HICCUP MODE CURRENT LIMIT THERMAL OVERLOAD PROTECTION MAXIMUM DUTY CYCLE OPERATION SYNCHRONIZATION CONVERTER CONFIGURATION SELECTING THE OUTPUT VOLTAGE SETTING THE OSCILLATOR FREQUENCY SYNCHRONIZATION AND CLKOUT OPERATION MODE CONFIGURATION EXTERNAL COMPONENTS SELECTION ADIsimPower DESIGN TOOL INPUT CAPACITOR SELECTION VDD RC FILTER INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION CONTROL LOOP COMPENSATION DESIGN EXAMPLE CHANNEL 1 CONFIGURATION AND COMPONENTS SELECTION CHANNEL 2 CONFIGURATION AND COMPONENTS SELECTION SYSTEM CONFIGURATION APPLICATION CIRCUITS POWER DISSIPATION AND THERMAL CONSIDERATIONS CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE