Datasheet LT3507 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionTriple Monolithic Step-Down Regulator with LDO
Pages / Page30 / 10 — applications inForMation STEP-DOWN CONSIDERATIONS. FB Resistor Network. …
File Format / SizePDF / 395 Kb
Document LanguageEnglish

applications inForMation STEP-DOWN CONSIDERATIONS. FB Resistor Network. Input Voltage Range

applications inForMation STEP-DOWN CONSIDERATIONS FB Resistor Network Input Voltage Range

Model Line for this Datasheet

Text Version of Document

LT3507
applications inForMation STEP-DOWN CONSIDERATIONS
on the charging times of the boost capacitor and can be approximated by the following equation:
FB Resistor Network
1 The output voltage is programmed with a resistor divider DCMAX = 1 (refer to the Block Diagram) between the output and the 1+ B FB pin. Choose the resistors according to: where B is the output current capacity divided by the typi- ⎛ V R1 ⎞ =R2 OUT ⎜ –1⎟ cal boost current from the BOOST pin current vs switch ⎝800mV ⎠ current in the Typical Performance Characteristics section. The parallel combination of R1 and R2 should be 10k or The maximum operating voltage without pulse-skipping less to avoid bias current errors. is determined by the minimum duty cycle DCMIN: V
Input Voltage Range
V OUT + VF IN(PS) = – V DC F + VSW MIN The minimum operating voltage is determined either by the LT3507’s internal undervoltage lockout (4V) or by with DCMIN = tON(MIN) • fSW. its maximum duty cycle. The duty cycle is the fraction of Thus both the maximum and minimum input voltages are time that the internal switch is on and is determined by a function of the switching frequency and output voltages. the input and output voltages: Therefore the maximum switching frequency must be set V to a value that accommodates all the input and output DC = OUT + VF voltage parameters and must meet both of the following VIN – VSW + VF criteria for each channel: where VF is the forward voltage drop of the catch diode ⎛ ⎞ (~0.4V) and V V SW is the voltage drop of the internal switch f OUT + VF MAX1 =⎜ ⎟ (~0.3V at maximum load). This leads to a minimum input ⎜ V ⎟• 1 ⎝ IN(PS) – VSW + VF ⎠ tON(MIN) voltage of: ⎛ V ⎞ V f OUT + VF ⎜ ⎟ V OUT + VF MAX2 = 1– ⎜ V ⎟• 1 t IN(MIN) = – VF + VSW ⎝ IN(MIN) – VSW + VF ⎠ OFF(MIN) DCMAX The values of t The duty cycle is the fraction of time that the internal switch ON(MIN) and tOFF(MIN) are functions of ISW and temperature (see chart in the Typical Performance is on during a clock cycle. The maximum duty cycle is Characteristics section). Worst-case values for switch cur- generally given by DCMAX = 1– tOFF(MIN)• fSW. However, rents greater than 0.5A are t unlike most fixed frequency regulators, the LT3507 will not ON(MIN) = 130ns (for TJ > 125°C t switch off at the end of each clock cycle if there is sufficient ON(MIN) = 155ns) and tOFF(MIN) = 170ns. voltage across the boost capacitor (C3 in Figure 1) to fully fMAX1 is the frequency at which the minimum duty cycle saturate the output switch. Forced switch off for a minimum is exceeded. The regulator will skip ON pulses in order to time will only occur at the end of a clock cycle when the reduce the overall duty cycle at frequencies above fMAX1. boost capacitor needs to be recharged. This operation It will continue to regulate but with increased inductor has the same effect as lowering the clock frequency for a current and greatly increased output ripple. The increased fixed off time, resulting in a higher duty cycle and lower peak inductor current in pulse-skipping will also stress minimum input voltage. The resultant duty cycle depends the switch transistor at high voltages and high switching frequency. If the LT3507 is allowed to pulse-skip and 3507fb 10 For more information www.linear.com/LT3507