Datasheet LTC3404 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator |
| Pages / Page | 16 / 8 — OPERATIO. Dropout Operation. Low Supply Operation. Short-Circuit … |
| File Format / Size | PDF / 215 Kb |
| Document Language | English |
OPERATIO. Dropout Operation. Low Supply Operation. Short-Circuit Protection. Frequency Synchronization
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Text Version of Document
LTC3404
U OPERATIO
When the converter is in Burst Mode operation, the peak low audio noise and reduced RF interference while provid- current of the inductor is set to approximately 250mA, ing reasonable low current efficiency. even though the voltage at the ITH pin indicates a lower Frequency synchronization is inhibited when the feedback value. The voltage at the ITH pin drops when the inductor’s voltage V average current is greater than the load requirement. As FB is below 0.6V. This prevents the external clock from interfering with the frequency foldback for short- the ITH voltage drops below approximately 0.55V, the circuit protection. BURST comparator trips, causing the internal sleep line to go high and forces off both power MOSFETs. The ITH pin
Dropout Operation
is then disconnected from the output of the EA amplifier and held a diode voltage (0.7V) above ground. When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maxi- In sleep mode, both power MOSFETs are held off and a mum on-time. Further reduction of the supply voltage majority of the internal circuitry is partially turned off, forces the main switch to remain on for more than one reducing the quiescent current to 10μA. The load current cycle until it reaches 100% duty cycle. The output voltage is now being supplied solely from the output capacitor. will then be determined by the input voltage minus the When the output voltage drops, the ITH pin reconnects to voltage drop across the internal P-channel MOSFET and the output of the EA amplifier and the top MOSFET is again the inductor. turned on and this process repeats.
Low Supply Operation Short-Circuit Protection
The LTC3404 is designed to operate down to an input When the output is shorted to ground, the frequency of the supply voltage of 2.65V although the maximum allowable oscillator is reduced to about 200kHz, 1/7 the nominal output current is reduced at this low voltage. Figure 1 frequency. This frequency foldback ensures that the shows the reduction in the maximum output current as a inductor current has ample time to decay, thereby prevent- function of input voltage for various output voltages. ing runaway. The oscillator’s frequency will progressively increase to 1.4MHz (or the synchronized frequency) when Another important detail to remember is that at low input V supply voltages, the R FB rises above 0.3V. DS(ON) of the P-channel switch increases. Therefore, the user should calculate the power
Frequency Synchronization
dissipation when the LTC3404 is used at 100% duty cycle with a low input voltage (see Thermal Considerations in A phase-locked loop (PLL) is available on the LTC3404 to the Applications Information section). allow the internal oscillator to be synchronized to an 1200 external source connected to the SYNC/MODE pin. The L = 4.7μH output of the phase detector at the PLL LPF pin operates 1000 over a 0V to 2.4V range corresponding to 1MHz to 1.7MHz. VOUT = 3.3V When locked, the PLL aligns the turn-on of the top MOS- 800 FET to the rising edge of the synchronizing signal. 600 VOUT = 2.5V When the LTC3404 is clocked by an external source, Burst 400 Mode operation is disabled; the LTC3404 then operates in VOUT = 1.5V PWM pulse skipping mode. In this mode, when the output 200 MAXIMUM OUTPUT CURRENT (mA) load is very low, current comparator ICOMP may remain 0 tripped for several cycles and force the main switch to stay 2.5 3.5 4.5 5.5 6.5 7.5 off for the same number of cycles. Increasing the output SUPPLY VOLTAGE (V) 3404 • F01 load slightly allows constant frequency PWM operation to resume. This mode exhibits low output ripple as well as
Figure 1. Maximum Output Current vs Input Voltage
3404fb 8
U OPERATIO
When the converter is in Burst Mode operation, the peak low audio noise and reduced RF interference while provid- current of the inductor is set to approximately 250mA, ing reasonable low current efficiency. even though the voltage at the ITH pin indicates a lower Frequency synchronization is inhibited when the feedback value. The voltage at the ITH pin drops when the inductor’s voltage V average current is greater than the load requirement. As FB is below 0.6V. This prevents the external clock from interfering with the frequency foldback for short- the ITH voltage drops below approximately 0.55V, the circuit protection. BURST comparator trips, causing the internal sleep line to go high and forces off both power MOSFETs. The ITH pin
Dropout Operation
is then disconnected from the output of the EA amplifier and held a diode voltage (0.7V) above ground. When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maxi- In sleep mode, both power MOSFETs are held off and a mum on-time. Further reduction of the supply voltage majority of the internal circuitry is partially turned off, forces the main switch to remain on for more than one reducing the quiescent current to 10μA. The load current cycle until it reaches 100% duty cycle. The output voltage is now being supplied solely from the output capacitor. will then be determined by the input voltage minus the When the output voltage drops, the ITH pin reconnects to voltage drop across the internal P-channel MOSFET and the output of the EA amplifier and the top MOSFET is again the inductor. turned on and this process repeats.
Low Supply Operation Short-Circuit Protection
The LTC3404 is designed to operate down to an input When the output is shorted to ground, the frequency of the supply voltage of 2.65V although the maximum allowable oscillator is reduced to about 200kHz, 1/7 the nominal output current is reduced at this low voltage. Figure 1 frequency. This frequency foldback ensures that the shows the reduction in the maximum output current as a inductor current has ample time to decay, thereby prevent- function of input voltage for various output voltages. ing runaway. The oscillator’s frequency will progressively increase to 1.4MHz (or the synchronized frequency) when Another important detail to remember is that at low input V supply voltages, the R FB rises above 0.3V. DS(ON) of the P-channel switch increases. Therefore, the user should calculate the power
Frequency Synchronization
dissipation when the LTC3404 is used at 100% duty cycle with a low input voltage (see Thermal Considerations in A phase-locked loop (PLL) is available on the LTC3404 to the Applications Information section). allow the internal oscillator to be synchronized to an 1200 external source connected to the SYNC/MODE pin. The L = 4.7μH output of the phase detector at the PLL LPF pin operates 1000 over a 0V to 2.4V range corresponding to 1MHz to 1.7MHz. VOUT = 3.3V When locked, the PLL aligns the turn-on of the top MOS- 800 FET to the rising edge of the synchronizing signal. 600 VOUT = 2.5V When the LTC3404 is clocked by an external source, Burst 400 Mode operation is disabled; the LTC3404 then operates in VOUT = 1.5V PWM pulse skipping mode. In this mode, when the output 200 MAXIMUM OUTPUT CURRENT (mA) load is very low, current comparator ICOMP may remain 0 tripped for several cycles and force the main switch to stay 2.5 3.5 4.5 5.5 6.5 7.5 off for the same number of cycles. Increasing the output SUPPLY VOLTAGE (V) 3404 • F01 load slightly allows constant frequency PWM operation to resume. This mode exhibits low output ripple as well as
Figure 1. Maximum Output Current vs Input Voltage
3404fb 8
