Datasheet LT1959 (Analog Devices) - 6

LT1959
U U U PIN FUNCTIONS FB:
The feedback pin is used to set output voltage using an radiate excess EMI. Keep the path between the input external voltage divider that generates 1.21V at the pin bypass and the GND pin short. The GND pin of the SO-8 with the desired output voltage. Three additional functions package is directly attached to the internal tab. This pin are performed by the FB pin. When the pin voltage drops should be attached to a large copper area to improve below 0.8V, switch current limit is reduced. Below 0.7V thermal resistance. the external sync function is disabled and switching fre-
V
quency is reduced. See Feedback Pin Function section in
SW:
The switch pin is the emitter of the on-chip power NPN switch. This pin is driven up to the input pin voltage Applications Information for details. during switch on time. Inductor current drives the switch
BOOST:
The BOOST pin is used to provide a drive voltage, pin negative during switch off time. Negative voltage is higher than the input voltage, to the internal bipolar NPN clamped with the external catch diode. Maximum negative power switch. Without this added voltage, the typical switch voltage allowed is – 0.8V. switch voltage loss would be about 1.5V. The additional
SYNC:
(S08 Package Only) The sync pin is used to boost voltage allows the switch to saturate and voltage synchronize the internal oscillator to an external signal. It loss approximates that of a 0.07Ω FET structure, but with is directly logic compatible and can be driven with any much smaller die area. Efficiency improves from 75% for signal between 10% and 90% duty cycle. The synchroniz- conventional bipolar designs to > 89% for these new parts. ing range is equal to initial operating frequency, up to
VIN:
This is the collector of the on-chip power NPN switch. 1MHz. See Synchronizing section in Applications Infor- This pin powers the internal circuitry and internal regula- mation for details. When not in use, this pin should be tor. At NPN switch on and off, high dI/dt edges occur on grounded. this pin. Keep the external bypass and catch diode close to
SHDN:
The shutdown pin is used to turn off the regulator this pin. All trace inductance on this path will create a and to reduce input drain current to a few microamperes. voltage spike at switch off, adding to the VCE voltage Actually, this pin has two separate thresholds, one at across the internal NPN. 2.38V to disable switching, and a second at 0.4V to force
GND:
The GND pin connection needs consideration for complete micropower shutdown. The 2.38V threshold two reasons. First, it acts as the reference for the regulated functions as an accurate undervoltage lockout (UVLO). output, so load regulation will suffer if the “ground” end of This is sometimes used to prevent the regulator from the load is not at the same voltage as the GND pin of the operating until the input votlage has reached a predeter- IC. This condition will occur when load current or other mined level. currents flow through metal paths between the GND pin
V
and the load ground point. Keep the ground path short
C:
The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally between the GND pin and the load and use a ground plane used for frequency compensation, but can do double duty when possible. The second consideration is EMI caused as a current clamp or control loop override. This pin sits by GND pin current spikes. Internal capacitance between at about 1V for very light loads and 2V at maximum load. the VSW pin and the GND pin creates very narrow (<10ns) It can be driven to ground to shut off the regulator, but if current spikes in the GND pin. If the GND pin is connected driven high, current must be limited to 4mA. to system ground with a long metal trace, this trace may 6