Datasheet LT1959 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 4.5A, 500kHz Step-Down Switching Regulator |
| Pages / Page | 24 / 7 — BLOCK DIAGRAM. PARASITIC DIODES. DO NOT FORWARD BIAS. Figure 1. Block … |
| File Format / Size | PDF / 305 Kb |
| Document Language | English |
BLOCK DIAGRAM. PARASITIC DIODES. DO NOT FORWARD BIAS. Figure 1. Block Diagram
Model Line for this Datasheet
Text Version of Document
LT1959
W BLOCK DIAGRAM
The LT1959 is a constant frequency, current mode buck and output capacitor, then an abrupt 180° shift will occur. converter. This means that there is an internal clock and The current fed system will have 90° phase shift at a much two feedback loops that control the duty cycle of the power lower frequency, but will not have the additional 90° shift switch. In addition to the normal error amplifier, there is a until well beyond the LC resonant frequency. This makes current sense amplifier that monitors switch current on a it much easier to frequency compensate the feedback loop cycle-by-cycle basis. A switch cycle starts with an oscilla- and also gives much quicker transient response. tor pulse which sets the RS flip-flop to turn the switch on. High switch efficiency is attained by using the BOOST pin When switch current reaches a level set by the inverting to provide a voltage to the switch driver which is higher input of the comparator, the flip-flop is reset and the than the input voltage, allowing switch to be saturated. switch turns off. Output voltage control is obtained by This boosted voltage is generated with an external capaci- using the output of the error amplifier to set the switch tor and diode. Two comparators are connected to the current trip point. This technique means that the error shutdown pin. One has a 2.38V threshold for undervoltage amplifier commands current to be delivered to the output lockout and the second has a 0.4V threshold for complete rather than voltage. A voltage fed system will have low shutdown. phase shift up to the resonant frequency of the inductor 0.01Ω INPUT + – CURRENT 2.9V BIAS INTERNAL SENSE REGULATOR V AMPLIFIER CC VOLTAGE GAIN = 20 SLOPE COMP Σ BOOST 0.9V 500kHz SYNC S OSCILLATOR Q1 CURRENT RS DRIVER POWER COMPARATOR FLIP-FLOP CIRCUITRY SHUTDOWN SWITCH + R COMPARATOR – VSW 0.4V FREQUENCY
PARASITIC DIODES
SHDN SHIFT CIRCUIT
DO NOT FORWARD BIAS
3.5µA FOLDBACK CURRENT Q2 LIMIT CLAMP – FB LOCKOUT + COMPARATOR ERROR VC AMPLIFIER 2.38V 1.21V gm = 2000µMho GND 1959 BD
Figure 1. Block Diagram
7
W BLOCK DIAGRAM
The LT1959 is a constant frequency, current mode buck and output capacitor, then an abrupt 180° shift will occur. converter. This means that there is an internal clock and The current fed system will have 90° phase shift at a much two feedback loops that control the duty cycle of the power lower frequency, but will not have the additional 90° shift switch. In addition to the normal error amplifier, there is a until well beyond the LC resonant frequency. This makes current sense amplifier that monitors switch current on a it much easier to frequency compensate the feedback loop cycle-by-cycle basis. A switch cycle starts with an oscilla- and also gives much quicker transient response. tor pulse which sets the RS flip-flop to turn the switch on. High switch efficiency is attained by using the BOOST pin When switch current reaches a level set by the inverting to provide a voltage to the switch driver which is higher input of the comparator, the flip-flop is reset and the than the input voltage, allowing switch to be saturated. switch turns off. Output voltage control is obtained by This boosted voltage is generated with an external capaci- using the output of the error amplifier to set the switch tor and diode. Two comparators are connected to the current trip point. This technique means that the error shutdown pin. One has a 2.38V threshold for undervoltage amplifier commands current to be delivered to the output lockout and the second has a 0.4V threshold for complete rather than voltage. A voltage fed system will have low shutdown. phase shift up to the resonant frequency of the inductor 0.01Ω INPUT + – CURRENT 2.9V BIAS INTERNAL SENSE REGULATOR V AMPLIFIER CC VOLTAGE GAIN = 20 SLOPE COMP Σ BOOST 0.9V 500kHz SYNC S OSCILLATOR Q1 CURRENT RS DRIVER POWER COMPARATOR FLIP-FLOP CIRCUITRY SHUTDOWN SWITCH + R COMPARATOR – VSW 0.4V FREQUENCY
PARASITIC DIODES
SHDN SHIFT CIRCUIT
DO NOT FORWARD BIAS
3.5µA FOLDBACK CURRENT Q2 LIMIT CLAMP – FB LOCKOUT + COMPARATOR ERROR VC AMPLIFIER 2.38V 1.21V gm = 2000µMho GND 1959 BD
Figure 1. Block Diagram
7
