Datasheet STSPIN32F0B (STMicroelectronics) - 9
| Manufacturer | STMicroelectronics |
| Description | Advanced single shunt BLDC controller with embedded STM32 MCU |
| Pages / Page | 36 / 9 — STSPIN32F0B. Electrical characteristics. Symbol. Parameter. Test … |
| File Format / Size | PDF / 6.5 Mb |
| Document Language | English |
STSPIN32F0B. Electrical characteristics. Symbol. Parameter. Test condition. Min. Typ. Max. Unit. Figure 4. Gate drivers timing. DS12907
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STSPIN32F0B Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit
RL = 2 kΩ; CL = 100 pF SR Slew rate - 10 - V/µs Vin 1 to 2 V step OC comparator PF6 = '0' PF7 = '1' 90 100 120 mV OCth Overcurrent threshold PF6 = '1' PF7 =' 0' 235 255 275 mV PF6 = '1' PF7 = '1' 465 505 545 mV OCth = 0.5 V; tCPD Comparator propagation delay - 80 120 ns OC_Comp: voltage step from 0 to 1 V tOCdeglitch Comparator input deglitch filter time 35 50 - ns tOCrelease Minimum overcurrent latch release pulse width - - 20 ns Thermal protection TSD Thermal shut-down temperature - 130 140 150 °C Thys Thermal shut-down hysteresis - 20 30 40 °C 1. The current consumption depends on the firmware loaded in the microcontroller. 2. Using the 47 μF capacitor (APXG250ARA470MF61G), 22 μH inductor (MLF1608C220KTA00), and diode 1N4448TR. 3. With 11 < VM < 13 V the linear output voltage can be VREG12 or 'VM-VREG12,drop' depending on the linear regulator is already turned-on or not. 4. See Figure 4. Gate drivers timing 5. MT = max. (|ton(LVG) - toff(LVG)|, |ton(HVG) - toff(HVG)|, |toff(LVG) - ton(HVG)|, |toff(HVG) - ton(LVG)|). 6. Guaranteed by design. 7. Guaranteed by IOUT test. 8. See Figure 17. Driver logic overcurrent management signals.
Figure 4. Gate drivers timing
50% 50% LS1 (2) (3) HS1 (2) (3) 90% LSU(V)(W) 10% HSU(V)(W) ton toff
DS12907
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Rev 1 page 9/36
Document Outline 1 Description 2 Block diagrams 3 Electrical data 3.1 Absolute maximum ratings 3.2 ESD protections 3.3 Recommended operating conditions 3.4 Thermal data 4 Electrical characteristics 5 Pin description 6 Device description 6.1 UVLO and thermal protections 6.1.1 UVLO on supply voltages 6.1.2 Thermal protection 6.2 DC/DC buck regulator 6.2.1 External optional 3.3 V supply voltage 6.3 Linear regulator 6.4 Standby mode 6.5 Gate drivers 6.6 Microcontroller unit 6.6.1 Memories and boot mode 6.6.2 Power management 6.6.3 High-speed external clock source 6.6.4 Advanced-control timer (TIM1) 6.7 Test mode 6.8 Operational amplifier 6.9 Comparator 6.10 ESD protection strategy 7 Application example 8 Package information 8.1 VFQFPN48 7 x 7 package information Revision history Contents List of tables List of figures
STSPIN32F0B Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit
RL = 2 kΩ; CL = 100 pF SR Slew rate - 10 - V/µs Vin 1 to 2 V step OC comparator PF6 = '0' PF7 = '1' 90 100 120 mV OCth Overcurrent threshold PF6 = '1' PF7 =' 0' 235 255 275 mV PF6 = '1' PF7 = '1' 465 505 545 mV OCth = 0.5 V; tCPD Comparator propagation delay - 80 120 ns OC_Comp: voltage step from 0 to 1 V tOCdeglitch Comparator input deglitch filter time 35 50 - ns tOCrelease Minimum overcurrent latch release pulse width - - 20 ns Thermal protection TSD Thermal shut-down temperature - 130 140 150 °C Thys Thermal shut-down hysteresis - 20 30 40 °C 1. The current consumption depends on the firmware loaded in the microcontroller. 2. Using the 47 μF capacitor (APXG250ARA470MF61G), 22 μH inductor (MLF1608C220KTA00), and diode 1N4448TR. 3. With 11 < VM < 13 V the linear output voltage can be VREG12 or 'VM-VREG12,drop' depending on the linear regulator is already turned-on or not. 4. See Figure 4. Gate drivers timing 5. MT = max. (|ton(LVG) - toff(LVG)|, |ton(HVG) - toff(HVG)|, |toff(LVG) - ton(HVG)|, |toff(HVG) - ton(LVG)|). 6. Guaranteed by design. 7. Guaranteed by IOUT test. 8. See Figure 17. Driver logic overcurrent management signals.
Figure 4. Gate drivers timing
50% 50% LS1 (2) (3) HS1 (2) (3) 90% LSU(V)(W) 10% HSU(V)(W) ton toff
DS12907
-
Rev 1 page 9/36
Document Outline 1 Description 2 Block diagrams 3 Electrical data 3.1 Absolute maximum ratings 3.2 ESD protections 3.3 Recommended operating conditions 3.4 Thermal data 4 Electrical characteristics 5 Pin description 6 Device description 6.1 UVLO and thermal protections 6.1.1 UVLO on supply voltages 6.1.2 Thermal protection 6.2 DC/DC buck regulator 6.2.1 External optional 3.3 V supply voltage 6.3 Linear regulator 6.4 Standby mode 6.5 Gate drivers 6.6 Microcontroller unit 6.6.1 Memories and boot mode 6.6.2 Power management 6.6.3 High-speed external clock source 6.6.4 Advanced-control timer (TIM1) 6.7 Test mode 6.8 Operational amplifier 6.9 Comparator 6.10 ESD protection strategy 7 Application example 8 Package information 8.1 VFQFPN48 7 x 7 package information Revision history Contents List of tables List of figures
