Datasheet ADL5304 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | High Speed, 200 dB Range, Current to Voltage Logarithmic Converter |
| Pages / Page | 32 / 6 — ADL5304. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. NUM. … |
| Revision | A |
| File Format / Size | PDF / 924 Kb |
| Document Language | English |
ADL5304. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. NUM. INNM. VPO. DCBI. NIC 1. 24 INPS. VSM1 2. 23 INMS. VSM2 3. 22 VLOG. INUM 4
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ADL5304 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S DC 5V NUM ON C V INNM IM VPO BS DCBI 1P NI 32 31 30 29 28 27 26 25 NIC 1 24 INPS VSM1 2 23 INMS VSM2 3 22 VLOG ADL5304 INUM 4 21 SCL1 IDEN 5 TOP VIEW 20 SCL2 (Not to Scale) IREF 6 19 SCL3 VSM3 7 18 ACOM VSM4 8 17 2VLT 9 10 11 12 13 14 15 16 M S S M EN M F EG CP VD INDN CO NM VN DNF ACO HF NOTES 1. NIC = NO INTERNAL CONNECTION.
002
2. CONNECT THE EXPOSED PADDLE TO THE VSM1 TO VSM4 PINS TO PROVIDE LOW LEAKAGE GUARD.
09459- Figure 2. 32-Lead LFCSP Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1, 25 NIC No Internal Connection. 2, 3, 7, 8 VSM1 to VSM4 Guard Pins for the INUM and IDEN Inputs. Connect these pins to the 1P5V, DCBI, and INPS pins for default single-supply setup; connect to ground if INUM (photodiode bias) is desired to be at ground (must have −5 V < VNEG < −2 V). 4 INUM Numerator Current Input. 5 IDEN Denominator Current Input. Connect to the IREF pin for most applications. 6 IREF 100 nA Trimmed Reference Current Output. Connect to the IDEN pin for most applications. 9 VDEN Voltage Output of Denominator Log Amplifier. Connect this pin to the INDN pin and decouple with an external 0.1 µF capacitor to ground. 10 INDN Denominator Voltage Input to Temperature Compensation Circuit. 11 COMM Main Ground. 12 NMFS Numerator Speed Bias (Nominal 1 kΩ Resistor to VNEG Pin). 13 VNEG Negative Supply. 14 DNFS Denominator Speed Bias (Nominal 1 kΩ Resistor to VNEG Pin). 15, 18 ACOM Analog Common, Low Noise Reference Ground. Important that both pins are always grounded. 16 HFCP High Frequency Compensation. 17 2VLT 2.0 V Reference Output. 19 SCL3 7.5 kΩ Scaling Resistor (See Figure 1). Default is NIC. 20 SCL2 5 kΩ Scaling Resistor (See Figure 1). Default is to connect to the INMS pin. 21 SCL1 5 kΩ Scaling Resistor (See Figure 1). Default is to connect to the VLOG pin. 22 VLOG Primary Logarithmic Output. For INUM = IDEN, the VLOG pin is at the voltage applied to the INPS pin. 23 INMS Output Buffer Amplifier Inverting Input. 24 INPS Output Buffer Amplifier Noninverting Input. The INPS, DCBI, and VSM1 to VSM4 pins must be tied together. 26 1P5V 1.5 V Reference Output. Connect to the INPS, DCBI, and VSM1 to VSM4 pins for single-supply operation. 27 DCBI Approximately 1.3 mA Bias Current. Connect this pin to the VSM1 to VSM4 pins. See Pin 2, Pin 3, Pin 7, and Pin 8 description. 28 BSDC Internal Bias Node. Decouple with a series connection of 4 Ω and 1 µF to ground. 29 VPOS Positive Supply. 30 IMON Photodiode Monitor Output. IMON = 1.1 × INUM. 31 INNM Numerator Voltage Input to Temperature Compensation Circuit. 32 VNUM Voltage Output of Numerator Log Amplifier. Connect this pin to the INNM pin. For the fastest response, do not add an external capacitor. 0 EPAD Exposed paddle. Connect the exposed paddle to the VSM1 to VSM4 pins to provide low leakage guard. Rev. A | Page 6 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION SIMPLIFIED BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION BASIC CONCEPTS OPTICAL MEASUREMENTS Decibel Scaling CIRCUIT DESCRIPTION Bandwidth vs. Current Noise vs. Current Filtering to Improve Noise and Dynamic Behavior Photodiode Bias Reference Outputs Buffer Amplifier Setting the Log Slope and Intercept Slope Inversion Log Ratio Operation APPLICATIONS INFORMATION USING THE ADL5304 Using the Adaptive Bias Summing Node Voltage Leakage VLOG Output Dynamic Response USING A NEGATIVE SUPPLY EVALUATION BOARD SCHEMATIC AND SILKSCREENS OUTLINE DIMENSIONS ORDERING GUIDE
ADL5304 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S DC 5V NUM ON C V INNM IM VPO BS DCBI 1P NI 32 31 30 29 28 27 26 25 NIC 1 24 INPS VSM1 2 23 INMS VSM2 3 22 VLOG ADL5304 INUM 4 21 SCL1 IDEN 5 TOP VIEW 20 SCL2 (Not to Scale) IREF 6 19 SCL3 VSM3 7 18 ACOM VSM4 8 17 2VLT 9 10 11 12 13 14 15 16 M S S M EN M F EG CP VD INDN CO NM VN DNF ACO HF NOTES 1. NIC = NO INTERNAL CONNECTION.
002
2. CONNECT THE EXPOSED PADDLE TO THE VSM1 TO VSM4 PINS TO PROVIDE LOW LEAKAGE GUARD.
09459- Figure 2. 32-Lead LFCSP Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1, 25 NIC No Internal Connection. 2, 3, 7, 8 VSM1 to VSM4 Guard Pins for the INUM and IDEN Inputs. Connect these pins to the 1P5V, DCBI, and INPS pins for default single-supply setup; connect to ground if INUM (photodiode bias) is desired to be at ground (must have −5 V < VNEG < −2 V). 4 INUM Numerator Current Input. 5 IDEN Denominator Current Input. Connect to the IREF pin for most applications. 6 IREF 100 nA Trimmed Reference Current Output. Connect to the IDEN pin for most applications. 9 VDEN Voltage Output of Denominator Log Amplifier. Connect this pin to the INDN pin and decouple with an external 0.1 µF capacitor to ground. 10 INDN Denominator Voltage Input to Temperature Compensation Circuit. 11 COMM Main Ground. 12 NMFS Numerator Speed Bias (Nominal 1 kΩ Resistor to VNEG Pin). 13 VNEG Negative Supply. 14 DNFS Denominator Speed Bias (Nominal 1 kΩ Resistor to VNEG Pin). 15, 18 ACOM Analog Common, Low Noise Reference Ground. Important that both pins are always grounded. 16 HFCP High Frequency Compensation. 17 2VLT 2.0 V Reference Output. 19 SCL3 7.5 kΩ Scaling Resistor (See Figure 1). Default is NIC. 20 SCL2 5 kΩ Scaling Resistor (See Figure 1). Default is to connect to the INMS pin. 21 SCL1 5 kΩ Scaling Resistor (See Figure 1). Default is to connect to the VLOG pin. 22 VLOG Primary Logarithmic Output. For INUM = IDEN, the VLOG pin is at the voltage applied to the INPS pin. 23 INMS Output Buffer Amplifier Inverting Input. 24 INPS Output Buffer Amplifier Noninverting Input. The INPS, DCBI, and VSM1 to VSM4 pins must be tied together. 26 1P5V 1.5 V Reference Output. Connect to the INPS, DCBI, and VSM1 to VSM4 pins for single-supply operation. 27 DCBI Approximately 1.3 mA Bias Current. Connect this pin to the VSM1 to VSM4 pins. See Pin 2, Pin 3, Pin 7, and Pin 8 description. 28 BSDC Internal Bias Node. Decouple with a series connection of 4 Ω and 1 µF to ground. 29 VPOS Positive Supply. 30 IMON Photodiode Monitor Output. IMON = 1.1 × INUM. 31 INNM Numerator Voltage Input to Temperature Compensation Circuit. 32 VNUM Voltage Output of Numerator Log Amplifier. Connect this pin to the INNM pin. For the fastest response, do not add an external capacitor. 0 EPAD Exposed paddle. Connect the exposed paddle to the VSM1 to VSM4 pins to provide low leakage guard. Rev. A | Page 6 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION SIMPLIFIED BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION BASIC CONCEPTS OPTICAL MEASUREMENTS Decibel Scaling CIRCUIT DESCRIPTION Bandwidth vs. Current Noise vs. Current Filtering to Improve Noise and Dynamic Behavior Photodiode Bias Reference Outputs Buffer Amplifier Setting the Log Slope and Intercept Slope Inversion Log Ratio Operation APPLICATIONS INFORMATION USING THE ADL5304 Using the Adaptive Bias Summing Node Voltage Leakage VLOG Output Dynamic Response USING A NEGATIVE SUPPLY EVALUATION BOARD SCHEMATIC AND SILKSCREENS OUTLINE DIMENSIONS ORDERING GUIDE
