Datasheet AD8283 (Analog Devices) - 9

Data Sheet AD8283 Pin No. Name Description
27 AVDD33D 3.3 V Analog Supply, Channel D. 28 IND− Negative LNA Analog Input for Channel D. 29 IND+ Positive LNA Analog Input for Channel D. 30 AVDD33E 3.3 V Analog Supply, Channel E. 31 INE− Negative LNA Analog Input for Channel E. 32 INE+ Positive LNA Analog Input for Channel E. 33 AVDD33F 3.3 V Analog Supply, Channel F. 34 INF− Negative LNA Analog Input for Channel F. 35 INF+ Positive LNA Analog Input for Channel F. 36 NC No Connect, Pin can be tied to any potential. 37 NC No Connect. Pin can be tied to any potential. 38 INADC− Negative Analog Input for Alternate Channel F (ADC Only). 39 INADC+ Positive Analog Input for Alternate Channel F (ADC Only). 40 AVDD18 1.8 V Analog Supply. 41 AVDD18ADC 1.8 V Analog Supply, ADC. 42 TEST3 Pin should not be used; tie to ground. 43 ANOUT Analog Outputs (Debug Purposes Only). Pin should be floated. 44 APOUT Analog Outputs (Debug Purposes Only). Pin should be floated. 45 BAND Band Gap Voltage (Debug Purposes Only). Pin should be floated. 46 RBIAS External resistor to set the internal ADC core bias current. 47 VREF Voltage Reference Input/Output. 48 AVDD33REF 3.3 V Analog Supply, References. 49 DVDD33CLK 3.3 V Digital Supply, Clock. 50 CLK− Clock Input Complement. 51 CLK+ Clock Input True. 52 DVDD18CLK 1.8 V Digital Supply, Clock. 53 TEST4 Pin should not be used; tie to ground. 54 NC No Connect. Pin can be tied to any potential. 55 NC No Connect. Pin can be tied to any potential. 56 DVDD33DRV 3.3 V Digital Supply, Output Driver. 57 D11 ADC Data Out (MSB). 58 D10 ADC Data Out. 59 D9 ADC Data Out. 60 D8 ADC Data Out. 61 D7 ADC Data Out. 62 D6 ADC Data Out. 63 D5 ADC Data Out. 64 D4 ADC Data Out. 65 D3 ADC Data Out. 66 D2 ADC Data Out. 67 D1 ADC Data Out. 68 D0 ADC Data Out (LSB). 69 NC No Connect. Pin should be left open. 70 NC No Connect. Pin should be left open. 71 DVDD33DRV 3.3 V Supply, Output Driver. 72 NC No Connect. Pin can be tied to any potential. Rev. C | Page 9 of 27 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Radar Receive Path AFE Channel Overview Low Noise Amplifier (LNA) Recommendation Antialiasing Filter (AAF) Mux and Mux Controller ADC Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations SDIO Pin SCLK Pin CS Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Serial Peripheral Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Logic Levels Reserved Locations Default Values Application Diagrams Outline Dimensions Ordering Guide Automotive Products